X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/5282a3d5b5624f59a4a11b061368e523934fe5f0..e8a319104a2ef2df5b920950a15b1e39bfe3fad0:/lincan/src/c_can.c diff --git a/lincan/src/c_can.c b/lincan/src/c_can.c index 4c052c3..2add428 100644 --- a/lincan/src/c_can.c +++ b/lincan/src/c_can.c @@ -466,7 +466,7 @@ int c_can_config_irqs(struct canchip_t *pchip, DEBUGMSG("(c%d)calling c_can_config_irqs(...)\n", pchip->chip_idx); tempreg = c_can_read_reg_w(pchip, CCCR); - //DEBUGMSG("-> CAN Control Register: 0x%.4lx\n",(long)tempreg); + DEBUGMSG("-> CAN Control Register: 0x%4lx\n",(long)tempreg); c_can_write_reg_w(pchip, tempreg | (irqs & 0xe), CCCR); DEBUGMSG("-> Configured hardware interrupt delivery\n"); return 0; @@ -484,29 +484,30 @@ int c_can_pre_read_config(struct canchip_t *pchip, struct msgobj_t *pmsgobj) spin_lock( &c_can_if1lock ); - //loading Message Object in IF1 if (c_can_if1_busycheck(pmsgobj->hostchip)) goto error_enodev; + //loading Message Object in IF1 c_can_write_reg_w(pmsgobj->hostchip, readMaskCM, CCIF1CM); c_can_write_reg_w(pmsgobj->hostchip, pmsgobj->object, CCIF1CR); - //setting Message Valid Bit to zero if (c_can_if1_busycheck(pmsgobj->hostchip)) goto error_enodev; + //setting Message Valid Bit to zero c_can_write_reg_w(pmsgobj->hostchip, 0, CCIF1A2); c_can_write_reg_w(pmsgobj->hostchip, writeMaskCM, CCIF1CM); c_can_write_reg_w(pmsgobj->hostchip, pmsgobj->object, CCIF1CR); - //Configuring Message-Object /* Only access when the C_CAN controller is idle */ if (c_can_if1_busycheck(pmsgobj->hostchip)) goto error_enodev; - mcreg = c_can_read_reg_w(pmsgobj->hostchip, CCIF1CM); + //Configuring Message-Object + mcreg = c_can_read_reg_w(pmsgobj->hostchip, CCIF1DMC); c_can_write_reg_w(pmsgobj->hostchip, ((mcreg & IFXMC_UMASK) | IFXMC_EOB | IFXMC_RXIE), CCIF1DMC); + //writing arbitration mask for extended or standart mode if (can_msgobj_test_fl(pmsgobj,RX_MODE_EXT)) {