X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/4aae63139869c3eb9150a3fd49ff682084e2072d..cb551cc1582f3b51cf17e80730bee3c2f0701c3f:/lincan/src/i82527.c

diff --git a/lincan/src/i82527.c b/lincan/src/i82527.c
index 6897948..03c2dce 100644
--- a/lincan/src/i82527.c
+++ b/lincan/src/i82527.c
@@ -280,18 +280,29 @@ int i82527_config_irqs(struct chip_t *chip, short irqs)
 
 int i82527_pre_read_config(struct chip_t *chip, struct msgobj_t *obj)
 {
-	if (extended) {
+	unsigned long id=obj->rx_preconfig_id;
+
+	can_msgobj_set_fl(obj,RX_MODE);
+
+	if (extended || can_msgobj_test_fl(obj,RX_MODE_EXT)) {
+		id<<=3;
+		canobj_write_reg(chip,obj,id,iMSGID3);
+		canobj_write_reg(chip,obj,id>>8,iMSGID2);
+		canobj_write_reg(chip,obj,id>>16,iMSGID1);
+		canobj_write_reg(chip,obj,id>>24,iMSGID0);
 		canobj_write_reg(chip,obj,MCFG_XTD,iMSGCFG);
-	}
-	else {
+	} else {
+		id<<=5;
+		canobj_write_reg(chip,obj,id,iMSGID1);
+		canobj_write_reg(chip,obj,id>>8,iMSGID0);
 		canobj_write_reg(chip,obj,0x00,iMSGCFG);
 	}
+
 	canobj_write_reg(chip,obj,(NEWD_RES|MLST_RES|TXRQ_RES|RMPD_RES), iMSGCTL1);
 	canobj_write_reg(chip,obj,(MVAL_SET|TXIE_RES|RXIE_SET|INTPD_RES),iMSGCTL0);
 
 	DEBUGMSG("i82527_pre_read_config: configured obj at 0x%08lx\n",obj->obj_base_addr);
 
-	
 	return 0;
 }
 
@@ -304,6 +315,8 @@ int i82527_pre_write_config(struct chip_t *chip, struct msgobj_t *obj,
 	len = msg->length;
 	if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
 
+	can_msgobj_clear_fl(obj,RX_MODE);
+
 	canobj_write_reg(chip,obj,(MVAL_SET|TXIE_SET|RXIE_RES|INTPD_RES),iMSGCTL0);
 	canobj_write_reg(chip,obj,(RMPD_RES|TXRQ_RES|CPUU_SET|NEWD_RES),iMSGCTL1);
 
@@ -549,33 +562,21 @@ static inline
 void i82527_irq_update_filter(struct chip_t *chip, struct msgobj_t *obj)
 {
 	struct canfilt_t filt;
-	unsigned long id;
 
 	if(canqueue_ends_filt_conjuction(obj->qends, &filt)) {
+		obj->rx_preconfig_id=filt.id;
 		canobj_write_reg(chip,obj,(MVAL_RES|TXIE_RES|RXIE_RES|INTPD_RES),iMSGCTL0);
 		if(obj->object == 15) {
 			i82527_message15_mask(chip,filt.id,filt.mask);
 		}
-		if (filt.flags&MSG_EXT) {
-			id=filt.id<<3;
-			canobj_write_reg(chip,obj,id,iMSGID3);
-			canobj_write_reg(chip,obj,id>>8,iMSGID2);
-			canobj_write_reg(chip,obj,id>>16,iMSGID1);
-			canobj_write_reg(chip,obj,id>>24,iMSGID0);
-			canobj_write_reg(chip,obj,MCFG_XTD,iMSGCFG);
-		}
-		else {
-			id=filt.id<<5;
-			canobj_write_reg(chip,obj,id,iMSGID1);
-			canobj_write_reg(chip,obj,id>>8,iMSGID0);
-			canobj_write_reg(chip,obj,0x00,iMSGCFG);
-		}
+		if (filt.flags&MSG_EXT)
+			can_msgobj_set_fl(obj,RX_MODE_EXT);
+		else
+			can_msgobj_clear_fl(obj,RX_MODE_EXT);
 
-		canobj_write_reg(chip,obj,(NEWD_RES|MLST_RES|TXRQ_RES|RMPD_RES), iMSGCTL1);
-		canobj_write_reg(chip,obj,(MVAL_SET|TXIE_RES|RXIE_SET|INTPD_RES),iMSGCTL0);
+		i82527_pre_read_config(chip, obj);
 
 		CANMSG("i82527_irq_update_filter: obj at 0x%08lx\n",obj->obj_base_addr);
-		
 	}
 }
 
@@ -717,8 +718,6 @@ int i82527_filtch_rq(struct chip_t *chip, struct msgobj_t *obj)
 
 	can_preempt_enable();
 	return 0;
-
-	return 0;
 }
 
 int i82527_register(struct chipspecops_t *chipspecops)