X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/3a2bb63f0bb8de2aafb346b53b945c59b3f87a41..8bf274975cae173308f3e85a70cf17834071873b:/lincan/src/ems_cpcpci.c

diff --git a/lincan/src/ems_cpcpci.c b/lincan/src/ems_cpcpci.c
index 603595d..41441f3 100644
--- a/lincan/src/ems_cpcpci.c
+++ b/lincan/src/ems_cpcpci.c
@@ -30,8 +30,13 @@
 
 /*PSB4610 PITA-2 bridge control registers*/   
 #define PITA2_ICR  0x00  /* Interrupt Control Register */
-#define   PITA2_ICR_INT0    0x00000002 /* [RC] INT0 Active/Clear */
-#define   PITA2_ICR_INT0_En 0x00020000 /* [RW] Enable INT0 */
+#define   PITA2_ICR_INT0    0x00000002	/* [RC] INT0 Active/Clear */
+#define   PITA2_ICR_GP0_INT 0x00000004	/* [RC] GP0 Interrupt */
+					/* GP0_Int_En=1, GP0_Out_En=0 and low detected */
+#define   PITA2_ICR_GP1_INT 0x00000008	/* [RC] GP1 Interrupt */
+#define   PITA2_ICR_GP2_INT 0x00000010	/* [RC] GP2 Interrupt */
+#define   PITA2_ICR_GP3_INT 0x00000020	/* [RC] GP2 Interrupt */
+#define   PITA2_ICR_INT0_En 0x00020000	/* [RW] Enable INT0 */
 
 #define PITA2_MISC 0x1C  /* Miscellaneous Register */
 #define   PITA2_MISC_CONFIG 0x04000000