X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/3129fcd8094edcb910b708463fdf1a234f11fb55..a4c9ead4b64bd4de307f375c2ff313a7a07a06e0:/lincan/src/pcm3680.c diff --git a/lincan/src/pcm3680.c b/lincan/src/pcm3680.c index 22330cb..dc3c274 100644 --- a/lincan/src/pcm3680.c +++ b/lincan/src/pcm3680.c @@ -4,16 +4,11 @@ * Rewritten for new CAN queues by Pavel Pisa - OCERA team member * email:pisa@cmp.felk.cvut.cz * This software is released under the GPL-License. - * Version lincan-0.2 9 Jul 2003 + * Version lincan-0.3 17 Jun 2004 */ -#include - -#include -#include -#include -#include - +#include "../include/can.h" +#include "../include/can_sysdep.h" #include "../include/main.h" #include "../include/pcm3680.h" #include "../include/i82527.h" @@ -59,7 +54,7 @@ int pcm3680_request_io(struct candevice_t *candev) } /** - * template_elease_io - free reserved io memory range + * template_release_io - free reserved io memory range * @candev: pointer to candevice/board which releases io * * The function template_release_io() is used to free reserved io-memory. @@ -96,20 +91,20 @@ int pcm3680_reset(struct candevice_t *candev) DEBUGMSG("Resetting pcm3680 hardware ...\n"); for(chipnr=0;chipnrnr_sja1000_chips;chipnr++) { chip=candev->chip[chipnr]; - pcm3680_write_register(MOD_RM, chip->chip_base_addr+SJAMOD); + pcm3680_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD); udelay(1000); pcm3680_write_register(0x00, chip->chip_base_addr + SJAIER); /* Write arbitrary data to reset chip */ pcm3680_write_register(0x01, chip->chip_base_addr + 0x100); udelay(1000); i=20; - while (pcm3680_read_register(chip->chip_base_addr+SJAMOD)&MOD_RM){ + while (pcm3680_read_register(chip->chip_base_addr+SJAMOD)&sjaMOD_RM){ if(!i--) return -ENODEV; udelay(1000); pcm3680_write_register(0, chip->chip_base_addr+SJAMOD); } udelay(1000); - pcm3680_write_register(CDR_PELICAN, chip->chip_base_addr+SJACDR); + pcm3680_write_register(sjaCDR_PELICAN, chip->chip_base_addr+SJACDR); pcm3680_write_register(0x00, chip->chip_base_addr + SJAIER); } @@ -129,7 +124,7 @@ int pcm3680_reset(struct candevice_t *candev) * %RESET_ADDR represents the io-address of the hardware reset register. * %NR_82527 represents the number of intel 82527 chips on the board. * %NR_SJA1000 represents the number of philips sja1000 chips on the board. - * The flags entry can currently only be %PROGRAMMABLE_IRQ to indicate that + * The flags entry can currently only be %CANDEV_PROGRAMMABLE_IRQ to indicate that * the hardware uses programmable interrupts. * Return Value: The function always returns zero * File: src/template.c @@ -140,7 +135,7 @@ int pcm3680_init_hw_data(struct candevice_t *candev) candev->nr_82527_chips=NR_82527; candev->nr_sja1000_chips=NR_SJA1000; candev->nr_all_chips=NR_82527+NR_SJA1000; - candev->flags &= ~PROGRAMMABLE_IRQ; + candev->flags &= ~CANDEV_PROGRAMMABLE_IRQ; return 0; } @@ -161,11 +156,11 @@ int pcm3680_init_hw_data(struct candevice_t *candev) * The @clock entry holds the chip clock value in Hz. * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider * register. Options defined in the %sja1000.h file: - * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN + * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN * The entry @sja_ocr_reg holds hardware specific options for the Output Control * register. Options defined in the %sja1000.h file: - * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK, - * %OCR_TX0_LH, %OCR_TX1_ZZ. + * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK, + * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ. * The entry @int_clk_reg holds hardware specific options for the Clock Out * register. Options defined in the %i82527.h file: * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1. @@ -183,9 +178,9 @@ int pcm3680_init_chip_data(struct candevice_t *candev, int chipnr) candev->chip[chipnr]->clock = 16000000; candev->chip[chipnr]->int_clk_reg = 0x0; candev->chip[chipnr]->int_bus_reg = 0x0; - candev->chip[chipnr]->sja_cdr_reg = CDR_CBP | CDR_CLK_OFF; - candev->chip[chipnr]->sja_ocr_reg = OCR_MODE_NORMAL | - OCR_TX0_LH; + candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF; + candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL | + sjaOCR_TX0_LH; return 0; } @@ -210,7 +205,6 @@ int pcm3680_init_chip_data(struct candevice_t *candev, int chipnr) int pcm3680_init_obj_data(struct chip_t *chip, int objnr) { chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr; - chip->msgobj[objnr]->flags=0; return 0; } @@ -221,7 +215,7 @@ int pcm3680_init_obj_data(struct chip_t *chip, int objnr) * * The function template_program_irq() is used for hardware that uses * programmable interrupts. If your hardware doesn't use programmable interrupts - * you should not set the @candevices_t->flags entry to %PROGRAMMABLE_IRQ and + * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and * leave this function unedited. Again this function is hardware specific so * there's no example code. * Return value: The function returns zero on success or %-ENODEV on failure @@ -243,7 +237,7 @@ int pcm3680_program_irq(struct candevice_t *candev) * Return Value: The function does not return a value * File: src/template.c */ -void pcm3680_write_register(unsigned char data, unsigned long address) +void pcm3680_write_register(unsigned data, unsigned long address) { writeb(data,address); }