X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/3129fcd8094edcb910b708463fdf1a234f11fb55..626f7414aee3ecd51ab35d093314919528f67b12:/lincan/src/pcccan.c diff --git a/lincan/src/pcccan.c b/lincan/src/pcccan.c index 0ca6f28..b6790ca 100644 --- a/lincan/src/pcccan.c +++ b/lincan/src/pcccan.c @@ -11,15 +11,8 @@ * You can probably find more information at http://www.gespac.com */ -#include - -#include -#include -#include -#include -#include -#include - +#include "../include/can.h" +#include "../include/can_sysdep.h" #include "../include/main.h" #include "../include/pcccan.h" #include "../include/i82527.h" @@ -27,6 +20,8 @@ int pcccan_irq=-1; unsigned long pcccan_base=0x0; +static can_spinlock_t pcccan_port_lock=SPIN_LOCK_UNLOCKED; + /* * IO_RANGE is the io-memory range that gets reserved, please adjust according * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or @@ -141,7 +136,7 @@ int pcccan_reset(struct candevice_t *candev) * %RESET_ADDR represents the io-address of the hardware reset register. * %NR_82527 represents the number of intel 82527 chips on the board. * %NR_SJA1000 represents the number of philips sja1000 chips on the board. - * The flags entry can currently only be %PROGRAMMABLE_IRQ to indicate that + * The flags entry can currently only be %CANDEV_PROGRAMMABLE_IRQ to indicate that * the hardware uses programmable interrupts. * Return Value: The function always returns zero * File: src/pcccan.c @@ -152,7 +147,7 @@ int pcccan_init_hw_data(struct candevice_t *candev) candev->nr_82527_chips=NR_82527; candev->nr_sja1000_chips=NR_SJA1000; candev->nr_all_chips=NR_82527+NR_SJA1000; - candev->flags &= ~PROGRAMMABLE_IRQ; + candev->flags &= ~CANDEV_PROGRAMMABLE_IRQ; return 0; } @@ -173,11 +168,11 @@ int pcccan_init_hw_data(struct candevice_t *candev) * The @clock entry holds the chip clock value in Hz. * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider * register. Options defined in the %sja1000.h file: - * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN + * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN * The entry @sja_ocr_reg holds hardware specific options for the Output Control * register. Options defined in the %sja1000.h file: - * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK, - * %OCR_TX0_LH, %OCR_TX1_ZZ. + * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK, + * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ. * The entry @int_clk_reg holds hardware specific options for the Clock Out * register. Options defined in the %i82527.h file: * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1. @@ -226,7 +221,6 @@ int pcccan_init_chip_data(struct candevice_t *candev, int chipnr) int pcccan_init_obj_data(struct chip_t *chip, int objnr) { chip->msgobj[objnr]->obj_base_addr=(objnr+1)*0x10; - chip->msgobj[objnr]->flags=0; return 0; } @@ -237,7 +231,7 @@ int pcccan_init_obj_data(struct chip_t *chip, int objnr) * * The function pcccan_program_irq() is used for hardware that uses * programmable interrupts. If your hardware doesn't use programmable interrupts - * you should not set the @candevices_t->flags entry to %PROGRAMMABLE_IRQ and + * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and * leave this function unedited. Again this function is hardware specific so * there's no example code. * Return value: The function returns zero on success or %-ENODEV on failure @@ -259,12 +253,13 @@ int pcccan_program_irq(struct candevice_t *candev) * Return Value: The function does not return a value * File: src/pcccan.c */ -void pcccan_write_register(unsigned char data, unsigned long address) +void pcccan_write_register(unsigned data, unsigned long address) { - disable_irq(pcccan_irq); + can_spin_irqflags_t flags; + can_spin_lock_irqsave(&pcccan_port_lock,flags); outb(address - pcccan_base, pcccan_base+1); outb(data, pcccan_base+6); - enable_irq(pcccan_irq); + can_spin_unlock_irqrestore(&pcccan_port_lock,flags); } /** @@ -280,10 +275,11 @@ void pcccan_write_register(unsigned char data, unsigned long address) unsigned pcccan_read_register(unsigned long address) { unsigned ret; - disable_irq(pcccan_irq); + can_spin_irqflags_t flags; + can_spin_lock_irqsave(&pcccan_port_lock,flags); outb(address - pcccan_base, pcccan_base+1); ret=inb(pcccan_base+2); - enable_irq(pcccan_irq); + can_spin_unlock_irqrestore(&pcccan_port_lock,flags); return ret; }