X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/2c5dbee366e95b46de0cb95cab23d2a94a13f184..04ac67cc3cac14cd601daacd0592121ec0b84012:/lincan/src/kv_pcican.c diff --git a/lincan/src/kv_pcican.c b/lincan/src/kv_pcican.c index eace091..cb0d4b5 100644 --- a/lincan/src/kv_pcican.c +++ b/lincan/src/kv_pcican.c @@ -1,11 +1,36 @@ -/* kv_pcican.c - support for KVASER PCIcan-S/D/Q cards - * Linux CAN-bus device driver. - * Written by Arnaud Westenberg email:arnaud@wanadoo.nl - * Rewritten for new CAN queues by Pavel Pisa - OCERA team member - * email:pisa@cmp.felk.cvut.cz - * This software is released under the GPL-License. - * Version lincan-0.2 9 Jul 2003 - */ +/**************************************************************************/ +/* File: kv_pcican.c - support for KVASER PCIcan-S/D/Q cards */ +/* */ +/* LinCAN - (Not only) Linux CAN bus driver */ +/* Copyright (C) 2002-2009 DCE FEE CTU Prague */ +/* Copyright (C) 2002-2009 Pavel Pisa */ +/* Funded by OCERA and FRESCOR IST projects */ +/* Based on CAN driver code by Arnaud Westenberg */ +/* */ +/* LinCAN is free software; you can redistribute it and/or modify it */ +/* under terms of the GNU General Public License as published by the */ +/* Free Software Foundation; either version 2, or (at your option) any */ +/* later version. LinCAN is distributed in the hope that it will be */ +/* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */ +/* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */ +/* General Public License for more details. You should have received a */ +/* copy of the GNU General Public License along with LinCAN; see file */ +/* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */ +/* Cambridge, MA 02139, USA. */ +/* */ +/* To allow use of LinCAN in the compact embedded systems firmware */ +/* and RT-executives (RTEMS for example), main authors agree with next */ +/* special exception: */ +/* */ +/* Including LinCAN header files in a file, instantiating LinCAN generics */ +/* or templates, or linking other files with LinCAN objects to produce */ +/* an application image/executable, does not by itself cause the */ +/* resulting application image/executable to be covered by */ +/* the GNU General Public License. */ +/* This exception does not however invalidate any other reasons */ +/* why the executable file might be covered by the GNU Public License. */ +/* Publication of enhanced or derived LinCAN files is required although. */ +/**************************************************************************/ #include "../include/can.h" #include "../include/can_sysdep.h" @@ -38,13 +63,13 @@ /* -You need to know the following: -" RX1 is connected to ground. -" TX1 is not connected. -" CLKO is not connected. -" Setting the OCR register to 0xDA is a good idea. - This means normal output mode , push-pull and the correct polarity. -" In the CDR register, you should set CBP to 1. +You need to know the following: +" RX1 is connected to ground. +" TX1 is not connected. +" CLKO is not connected. +" Setting the OCR register to 0xDA is a good idea. + This means normal output mode , push-pull and the correct polarity. +" In the CDR register, you should set CBP to 1. You will probably also want to set the clock divider value to 0 (meaning divide-by-2), the Pelican bit, and the clock-off bit (you have no need for CLKOUT anyway.) @@ -56,18 +81,18 @@ void kv_pcican_disconnect_irq(struct candevice_t *candev) { unsigned long tmp; /* Disable interrupts from card */ - tmp = inl(candev->dev_base_addr + S5920_INTCSR); + tmp = can_inl(candev->dev_base_addr + S5920_INTCSR); tmp &= ~INTCSR_ADDON_INTENABLE_M; - outl(tmp, candev->dev_base_addr + S5920_INTCSR); + can_outl(tmp, candev->dev_base_addr + S5920_INTCSR); } void kv_pcican_connect_irq(struct candevice_t *candev) { unsigned long tmp; /* Enable interrupts from card */ - tmp = inl(candev->dev_base_addr + S5920_INTCSR); + tmp = can_inl(candev->dev_base_addr + S5920_INTCSR); tmp |= INTCSR_ADDON_INTENABLE_M; - outl(tmp, candev->dev_base_addr + S5920_INTCSR); + can_outl(tmp, candev->dev_base_addr + S5920_INTCSR); } @@ -101,7 +126,7 @@ int kv_pcican_request_io(struct candevice_t *candev) error_io: pci_release_region(candev->sysdevptr.pcidev, 0); #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/ - + return -ENODEV; } @@ -121,26 +146,26 @@ int kv_pcican_release_io(struct candevice_t *candev) } -void kv_pcican_write_register(unsigned char data, unsigned long address) +void kv_pcican_write_register(unsigned data, can_ioptr_t address) { - outb(data,address); + can_outb(data,address); } -unsigned kv_pcican_read_register(unsigned long address) +unsigned kv_pcican_read_register(can_ioptr_t address) { - return inb(address); + return can_inb(address); } int kv_pcican_reset(struct candevice_t *candev) { int i=0,chip_nr; - struct chip_t *chip; + struct canchip_t *chip; unsigned cdr; DEBUGMSG("Resetting kv_pcican hardware ...\n"); /* Assert PTADR# - we're in passive mode so the other bits are not important */ - outl(0x80808080L, candev->dev_base_addr + S5920_PTCR); + can_outl(0x80808080L, candev->dev_base_addr + S5920_PTCR); kv_pcican_disconnect_irq(candev); @@ -148,60 +173,63 @@ int kv_pcican_reset(struct candevice_t *candev) if(!candev->chip[chip_nr]) continue; chip=candev->chip[chip_nr]; - kv_pcican_write_register(MOD_RM, chip->chip_base_addr+SJAMOD); + kv_pcican_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD); udelay(1000); cdr=kv_pcican_read_register(chip->chip_base_addr+SJACDR); - kv_pcican_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR); + kv_pcican_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR); kv_pcican_write_register(0, chip->chip_base_addr+SJAIER); i=20; kv_pcican_write_register(0, chip->chip_base_addr+SJAMOD); - while (kv_pcican_read_register(chip->chip_base_addr+SJAMOD)&MOD_RM){ + while (kv_pcican_read_register(chip->chip_base_addr+SJAMOD)&sjaMOD_RM){ if(!i--) return -ENODEV; udelay(1000); kv_pcican_write_register(0, chip->chip_base_addr+SJAMOD); } cdr=kv_pcican_read_register(chip->chip_base_addr+SJACDR); - kv_pcican_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR); + kv_pcican_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR); kv_pcican_write_register(0, chip->chip_base_addr+SJAIER); - + kv_pcican_read_register(chip->chip_base_addr+SJAIR); } - + kv_pcican_connect_irq(candev); return 0; -} +} int kv_pcican_init_hw_data(struct candevice_t *candev) { - struct pci_dev *pcidev = NULL; + struct pci_dev *pcidev; int i; - pcidev = pci_find_device(KV_PCICAN_PCICAN_VENDOR, KV_PCICAN_PCICAN_ID, pcidev); - if(pcidev == NULL) return -ENODEV; - + pcidev = can_pci_get_next_untaken_device(KV_PCICAN_PCICAN_VENDOR, KV_PCICAN_PCICAN_ID); + if(pcidev == NULL) + return -ENODEV; + if (pci_enable_device (pcidev)){ printk(KERN_CRIT "Setup of PCICAN failed\n"); + can_pci_dev_put(pcidev); return -EIO; } candev->sysdevptr.pcidev=pcidev; - + for(i=0;i<3;i++){ - if(!(pci_resource_flags(pcidev,0)&IORESOURCE_IO)){ + if(!(pci_resource_flags(pcidev,i)&IORESOURCE_IO)){ printk(KERN_CRIT "PCICAN region %d is not IO\n",i); + can_pci_dev_put(pcidev); return -EIO; } } candev->dev_base_addr=pci_resource_start(pcidev,0); /*S5920*/ candev->io_addr=pci_resource_start(pcidev,1); /*IO window for SJA1000 chips*/ candev->res_addr=pci_resource_start(pcidev,2); /*XILINX board wide address*/ - + /*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/ if (!strcmp(candev->hwname,"pcican-s")) { @@ -223,29 +251,36 @@ int kv_pcican_init_hw_data(struct candevice_t *candev) return 0; } +void kv_pcican_done_hw_data(struct candevice_t *candev) +{ + struct pci_dev *pcidev = candev->sysdevptr.pcidev; + can_pci_dev_put(pcidev); +} + int kv_pcican_init_chip_data(struct candevice_t *candev, int chipnr) { if(candev->sysdevptr.pcidev==NULL) return -ENODEV; - + candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq; - candev->chip[chipnr]->chip_type="sja1000p"; + sja1000p_fill_chipspecops(candev->chip[chipnr]); candev->chip[chipnr]->chip_base_addr= candev->io_addr+chipnr*KV_PCICAN_BYTES_PER_CIRCUIT; candev->chip[chipnr]->flags = 0; candev->chip[chipnr]->int_cpu_reg = 0; candev->chip[chipnr]->int_clk_reg = 0; candev->chip[chipnr]->int_bus_reg = 0; - candev->chip[chipnr]->sja_cdr_reg = CDR_CBP | CDR_CLK_OFF; + candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF; candev->chip[chipnr]->sja_ocr_reg = KV_PCICAN_OCR_DEFAULT_STD; candev->chip[chipnr]->clock = 16000000; + candev->chip[chipnr]->flags |= CHIP_IRQ_PCI; return 0; -} +} -int kv_pcican_init_obj_data(struct chip_t *chip, int objnr) +int kv_pcican_init_obj_data(struct canchip_t *chip, int objnr) { chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr; return 0; @@ -263,6 +298,7 @@ int kv_pcican_register(struct hwspecops_t *hwspecops) hwspecops->release_io = kv_pcican_release_io; hwspecops->reset = kv_pcican_reset; hwspecops->init_hw_data = kv_pcican_init_hw_data; + hwspecops->done_hw_data = kv_pcican_done_hw_data; hwspecops->init_chip_data = kv_pcican_init_chip_data; hwspecops->init_obj_data = kv_pcican_init_obj_data; hwspecops->write_register = kv_pcican_write_register;