X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/11132ea490f9e860744ee4f851c67e7fb4444231..75d77a3d5177ad90a0e319102c776852df2bccb7:/lincan/src/sja1000p.c diff --git a/lincan/src/sja1000p.c b/lincan/src/sja1000p.c index 19e2e57..59fa68d 100644 --- a/lincan/src/sja1000p.c +++ b/lincan/src/sja1000p.c @@ -6,56 +6,60 @@ * Rewritten for new CAN queues by Pavel Pisa - OCERA team member * email:pisa@cmp.felk.cvut.cz * This software is released under the GPL-License. - * Version lincan-0.2 9 Jul 2003 + * Version lincan-0.3 17 Jun 2004 */ -#include - -#include -#include -#include - +#include "../include/can.h" +#include "../include/can_sysdep.h" #include "../include/main.h" #include "../include/sja1000p.h" -int sja1000p_enable_configuration(struct chip_t *chip) +/** + * sja1000p_enable_configuration - enable chip configuration mode + * @chip: pointer to chip state structure + */ +int sja1000p_enable_configuration(struct canchip_t *chip) { int i=0; enum sja1000_PeliCAN_MOD flags; - disable_irq(chip->chip_irq); + can_disable_irq(chip->chip_irq); flags=can_read_reg(chip,SJAMOD); - while ((!(flags & MOD_RM)) && (i<=10)) { - can_write_reg(chip, MOD_RM, SJAMOD); -// TODO: configurable MOD_AFM (32/16 bit acceptance filter) -// config MOD_LOM (listen only) + while ((!(flags & sjaMOD_RM)) && (i<=10)) { + can_write_reg(chip, sjaMOD_RM, SJAMOD); +// TODO: configurable sjaMOD_AFM (32/16 bit acceptance filter) +// config sjaMOD_LOM (listen only) udelay(100); i++; flags=can_read_reg(chip, SJAMOD); } if (i>=10) { CANMSG("Reset error\n"); - enable_irq(chip->chip_irq); + can_enable_irq(chip->chip_irq); return -ENODEV; } return 0; } -int sja1000p_disable_configuration(struct chip_t *chip) +/** + * sja1000p_disable_configuration - disable chip configuration mode + * @chip: pointer to chip state structure + */ +int sja1000p_disable_configuration(struct canchip_t *chip) { int i=0; enum sja1000_PeliCAN_MOD flags; flags=can_read_reg(chip,SJAMOD); - while ( (flags & MOD_RM) && (i<=50) ) { + while ( (flags & sjaMOD_RM) && (i<=50) ) { // could be as long as 11*128 bit times after buss-off can_write_reg(chip, 0, SJAMOD); -// TODO: configurable MOD_AFM (32/16 bit acceptance filter) -// config MOD_LOM (listen only) +// TODO: configurable sjaMOD_AFM (32/16 bit acceptance filter) +// config sjaMOD_LOM (listen only) udelay(100); i++; flags=can_read_reg(chip, SJAMOD); @@ -65,7 +69,7 @@ int sja1000p_disable_configuration(struct chip_t *chip) return -ENODEV; } - enable_irq(chip->chip_irq); + can_enable_irq(chip->chip_irq); return 0; } @@ -82,26 +86,47 @@ int sja1000p_disable_configuration(struct chip_t *chip) * Return Value: negative value reports error. * File: src/sja1000p.c */ -int sja1000p_chip_config(struct chip_t *chip) +int sja1000p_chip_config(struct canchip_t *chip) { + int i; + unsigned char n, r; + if (sja1000p_enable_configuration(chip)) return -ENODEV; /* Set mode, clock out, comparator */ - can_write_reg(chip,CDR_PELICAN|chip->sja_cdr_reg,SJACDR); + can_write_reg(chip,sjaCDR_PELICAN|chip->sja_cdr_reg,SJACDR); + + /* Ensure, that interrupts are disabled even on the chip level now */ + can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER); + /* Set driver output configuration */ can_write_reg(chip,chip->sja_ocr_reg,SJAOCR); + + /* Simple check for chip presence */ + for (i=0, n=0x5a; i<8; i++, n+=0xf) { + can_write_reg(chip,n,SJAACR0+i); + } + for (i=0, n=0x5a; i<8; i++, n+=0xf) { + r = n^can_read_reg(chip,SJAACR0+i); + if (r) { + CANMSG("sja1000p_chip_config: chip connection broken," + " readback differ 0x%02x\n", r); + return -ENODEV; + } + } + if (sja1000p_extended_mask(chip,0x00000000, 0xffffffff)) return -ENODEV; - if (!baudrate) - baudrate=1000; - if (sja1000p_baud_rate(chip,1000*baudrate,chip->clock,0,75,0)) + if (!chip->baudrate) + chip->baudrate=1000000; + if (sja1000p_baud_rate(chip,chip->baudrate,chip->clock,0,75,0)) return -ENODEV; /* Enable hardware interrupts */ - can_write_reg(chip, ENABLE_INTERRUPTS, SJAIER); + can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER); sja1000p_disable_configuration(chip); @@ -117,7 +142,7 @@ int sja1000p_chip_config(struct chip_t *chip) * Return Value: negative value reports error. * File: src/sja1000p.c */ -int sja1000p_extended_mask(struct chip_t *chip, unsigned long code, unsigned long mask) +int sja1000p_extended_mask(struct canchip_t *chip, unsigned long code, unsigned long mask) { int i; @@ -152,7 +177,7 @@ int sja1000p_extended_mask(struct chip_t *chip, unsigned long code, unsigned lo * Return Value: negative value reports error. * File: src/sja1000p.c */ -int sja1000p_baud_rate(struct chip_t *chip, int rate, int clock, int sjw, +int sja1000p_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw, int sampl_pt, int flags) { int best_error = 1000000000, error; @@ -165,7 +190,7 @@ int sja1000p_baud_rate(struct chip_t *chip, int rate, int clock, int sjw, clock /=2; /* tseg even = round down, odd = round up */ - for (tseg=(0+0+2)*2; tseg<=(MAX_TSEG2+MAX_TSEG1+2)*2+1; tseg++) { + for (tseg=(0+0+2)*2; tseg<=(sjaMAX_TSEG2+sjaMAX_TSEG1+2)*2+1; tseg++) { brp = clock/((1+tseg/2)*rate)+tseg%2; if (brp == 0 || brp > 64) continue; @@ -189,11 +214,11 @@ int sja1000p_baud_rate(struct chip_t *chip, int rate, int clock, int sjw, tseg2 = best_tseg-(sampl_pt*(best_tseg+1))/100; if (tseg2 < 0) tseg2 = 0; - if (tseg2 > MAX_TSEG2) - tseg2 = MAX_TSEG2; + if (tseg2 > sjaMAX_TSEG2) + tseg2 = sjaMAX_TSEG2; tseg1 = best_tseg-tseg2-2; - if (tseg1>MAX_TSEG1) { - tseg1 = MAX_TSEG1; + if (tseg1>sjaMAX_TSEG1) { + tseg1 = sjaMAX_TSEG1; tseg2 = best_tseg-tseg1-2; } @@ -219,11 +244,11 @@ int sja1000p_baud_rate(struct chip_t *chip, int rate, int clock, int sjw, * * File: src/sja1000p.c */ -void sja1000p_read(struct chip_t *chip, struct msgobj_t *obj) { +void sja1000p_read(struct canchip_t *chip, struct msgobj_t *obj) { int i, flags, len, datastart; do { flags = can_read_reg(chip,SJAFRM); - if(flags&FRM_FF) { + if(flags&sjaFRM_FF) { obj->rx_msg.id = (can_read_reg(chip,SJAID0)<<21) + (can_read_reg(chip,SJAID1)<<13) + @@ -237,19 +262,23 @@ void sja1000p_read(struct chip_t *chip, struct msgobj_t *obj) { datastart = SJADATS; } obj->rx_msg.flags = - ((flags & FRM_RTR) ? MSG_RTR : 0) | - ((flags & FRM_FF) ? MSG_EXT : 0); - len = flags & FRM_DLC_M; + ((flags & sjaFRM_RTR) ? MSG_RTR : 0) | + ((flags & sjaFRM_FF) ? MSG_EXT : 0); + len = flags & sjaFRM_DLC_M; + obj->rx_msg.length = len; + if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH; for(i=0; i< len; i++) { obj->rx_msg.data[i]=can_read_reg(chip,datastart+i); } - obj->rx_msg.length = len; + + /* fill CAN message timestamp */ + can_filltimestamp(&obj->rx_msg.timestamp); canque_filter_msg2edges(obj->qends, &obj->rx_msg); - can_write_reg(chip, CMR_RRB, SJACMR); + can_write_reg(chip, sjaCMR_RRB, SJACMR); - } while (can_read_reg(chip, SJASR) & SR_RBS); + } while (can_read_reg(chip, SJASR) & sjaSR_RBS); } /** @@ -261,12 +290,12 @@ void sja1000p_read(struct chip_t *chip, struct msgobj_t *obj) { * Positive value indicates immediate reception of message. * File: src/sja1000p.c */ -int sja1000p_pre_read_config(struct chip_t *chip, struct msgobj_t *obj) +int sja1000p_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj) { int status; status=can_read_reg(chip,SJASR); - if(status & SR_BS) { + if(status & sjaSR_BS) { /* Try to recover from error condition */ DEBUGMSG("sja1000p_pre_read_config bus-off recover 0x%x\n",status); sja1000p_enable_configuration(chip); @@ -276,13 +305,13 @@ int sja1000p_pre_read_config(struct chip_t *chip, struct msgobj_t *obj) sja1000p_disable_configuration(chip); } - if (!(status&SR_RBS)) { + if (!(status&sjaSR_RBS)) { return 0; } - can_write_reg(chip, DISABLE_INTERRUPTS, SJAIER); //disable interrupts for a moment + can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER); //disable interrupts for a moment sja1000p_read(chip, obj); - can_write_reg(chip, ENABLE_INTERRUPTS, SJAIER); //enable interrupts + can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER); //enable interrupts return 1; } @@ -300,20 +329,21 @@ int sja1000p_pre_read_config(struct chip_t *chip, struct msgobj_t *obj) * Return Value: negative value reports error. * File: src/sja1000p.c */ -int sja1000p_pre_write_config(struct chip_t *chip, struct msgobj_t *obj, +int sja1000p_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj, struct canmsg_t *msg) { int i=0; unsigned int id; int status; + int len; /* Wait until Transmit Buffer Status is released */ - while ( !((status=can_read_reg(chip, SJASR)) & SR_TBS) && + while ( !((status=can_read_reg(chip, SJASR)) & sjaSR_TBS) && i++length &= FRM_DLC_M; - can_write_reg(chip, ((msg->flags&MSG_EXT)?FRM_FF:0) | - ((msg->flags & MSG_RTR) ? FRM_RTR : 0) | - msg->length, SJAFRM); + len = msg->length; + if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH; + /* len &= sjaFRM_DLC_M; ensured by above condition already */ + can_write_reg(chip, ((msg->flags&MSG_EXT)?sjaFRM_FF:0) | + ((msg->flags & MSG_RTR) ? sjaFRM_RTR : 0) | len, SJAFRM); if(msg->flags&MSG_EXT) { id=msg->id<<3; can_write_reg(chip, id & 0xff, SJAID3); @@ -352,14 +383,14 @@ int sja1000p_pre_write_config(struct chip_t *chip, struct msgobj_t *obj, can_write_reg(chip, id & 0xff, SJAID1); id >>= 8; can_write_reg(chip, id, SJAID0); - for(i=0; i < msg->length; i++) { + for(i=0; i < len; i++) { can_write_reg(chip, msg->data[i], SJADATE+i); } } else { id=msg->id<<5; can_write_reg(chip, (id >> 8) & 0xff, SJAID0); can_write_reg(chip, id & 0xff, SJAID1); - for(i=0; i < msg->length; i++) { + for(i=0; i < len; i++) { can_write_reg(chip, msg->data[i], SJADATS+i); } } @@ -377,10 +408,10 @@ int sja1000p_pre_write_config(struct chip_t *chip, struct msgobj_t *obj, * Return Value: negative value reports error. * File: src/sja1000p.c */ -int sja1000p_send_msg(struct chip_t *chip, struct msgobj_t *obj, +int sja1000p_send_msg(struct canchip_t *chip, struct msgobj_t *obj, struct canmsg_t *msg) { - can_write_reg(chip, CMR_TR, SJACMR); + can_write_reg(chip, sjaCMR_TR, SJACMR); return 0; } @@ -394,9 +425,9 @@ int sja1000p_send_msg(struct chip_t *chip, struct msgobj_t *obj, * Zero value indicates finishing of all issued transmission requests. * File: src/sja1000p.c */ -int sja1000p_check_tx_stat(struct chip_t *chip) +int sja1000p_check_tx_stat(struct canchip_t *chip) { - if (can_read_reg(chip,SJASR) & SR_TCS) + if (can_read_reg(chip,SJASR) & sjaSR_TCS) return 0; else return 1; @@ -411,7 +442,7 @@ int sja1000p_check_tx_stat(struct chip_t *chip) * Return Value: negative value reports error. * File: src/sja1000p.c */ -int sja1000p_set_btregs(struct chip_t *chip, unsigned short btr0, +int sja1000p_set_btregs(struct canchip_t *chip, unsigned short btr0, unsigned short btr1) { if (sja1000p_enable_configuration(chip)) @@ -426,17 +457,17 @@ int sja1000p_set_btregs(struct chip_t *chip, unsigned short btr0, } /** - * sja1000p_stop_chip: - starts chip message processing + * sja1000p_start_chip: - starts chip message processing * @chip: pointer to chip state structure * * Return Value: negative value reports error. * File: src/sja1000p.c */ -int sja1000p_start_chip(struct chip_t *chip) +int sja1000p_start_chip(struct canchip_t *chip) { enum sja1000_PeliCAN_MOD flags; - flags = can_read_reg(chip, SJAMOD) & (MOD_LOM|MOD_STM|MOD_AFM|MOD_SM); + flags = can_read_reg(chip, SJAMOD) & (sjaMOD_LOM|sjaMOD_STM|sjaMOD_AFM|sjaMOD_SM); can_write_reg(chip, flags, SJAMOD); return 0; @@ -449,16 +480,42 @@ int sja1000p_start_chip(struct chip_t *chip) * Return Value: negative value reports error. * File: src/sja1000p.c */ -int sja1000p_stop_chip(struct chip_t *chip) +int sja1000p_stop_chip(struct canchip_t *chip) { enum sja1000_PeliCAN_MOD flags; - flags = can_read_reg(chip, SJAMOD) & (MOD_LOM|MOD_STM|MOD_AFM|MOD_SM); - can_write_reg(chip, flags|MOD_RM, SJAMOD); + flags = can_read_reg(chip, SJAMOD) & (sjaMOD_LOM|sjaMOD_STM|sjaMOD_AFM|sjaMOD_SM); + can_write_reg(chip, flags|sjaMOD_RM, SJAMOD); return 0; } +/** + * sja1000p_attach_to_chip: - attaches to the chip, setups registers and state + * @chip: pointer to chip state structure + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_attach_to_chip(struct canchip_t *chip) +{ + return 0; +} + +/** + * sja1000p_release_chip: - called before chip structure removal if %CHIP_ATTACHED is set + * @chip: pointer to chip state structure + * + * Return Value: negative value reports error. + * File: src/sja1000p.c + */ +int sja1000p_release_chip(struct canchip_t *chip) +{ + sja1000p_stop_chip(chip); + can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER); + + return 0; +} /** * sja1000p_remote_request: - configures message object and asks for RTR message @@ -468,7 +525,7 @@ int sja1000p_stop_chip(struct chip_t *chip) * Return Value: negative value reports error. * File: src/sja1000p.c */ -int sja1000p_remote_request(struct chip_t *chip, struct msgobj_t *obj) +int sja1000p_remote_request(struct canchip_t *chip, struct msgobj_t *obj) { CANMSG("sja1000p_remote_request not implemented\n"); return -ENOSYS; @@ -483,7 +540,7 @@ int sja1000p_remote_request(struct chip_t *chip, struct msgobj_t *obj) * Return Value: negative value reports error. * File: src/sja1000p.c */ -int sja1000p_standard_mask(struct chip_t *chip, unsigned short code, +int sja1000p_standard_mask(struct canchip_t *chip, unsigned short code, unsigned short mask) { CANMSG("sja1000p_standard_mask not implemented\n"); @@ -497,7 +554,7 @@ int sja1000p_standard_mask(struct chip_t *chip, unsigned short code, * Return Value: negative value reports error. * File: src/sja1000p.c */ -int sja1000p_clear_objects(struct chip_t *chip) +int sja1000p_clear_objects(struct canchip_t *chip) { CANMSG("sja1000p_clear_objects not implemented\n"); return -ENOSYS; @@ -511,7 +568,7 @@ int sja1000p_clear_objects(struct chip_t *chip) * Return Value: negative value reports error. * File: src/sja1000p.c */ -int sja1000p_config_irqs(struct chip_t *chip, short irqs) +int sja1000p_config_irqs(struct canchip_t *chip, short irqs) { CANMSG("sja1000p_config_irqs not implemented\n"); return -ENOSYS; @@ -528,18 +585,29 @@ int sja1000p_config_irqs(struct chip_t *chip, short irqs) * sja1000p_irq_write_handler() for transmit events. * File: src/sja1000p.c */ -void sja1000p_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj) +void sja1000p_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj) { int cmd; if(obj->tx_slot){ + /* Do local transmitted message distribution if enabled */ + if (processlocal){ + /* fill CAN message timestamp */ + can_filltimestamp(&obj->tx_slot->msg.timestamp); + + obj->tx_slot->msg.flags |= MSG_LOCAL; + canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg); + } + /* Free transmitted slot */ canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot); obj->tx_slot=NULL; } + can_msgobj_clear_fl(obj,TX_PENDING); cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot); if(cmd<0) return; + can_msgobj_set_fl(obj,TX_PENDING); if (chip->chipspecops->pre_write_config(chip, obj, &obj->tx_slot->msg)) { obj->ret = -1; @@ -563,10 +631,7 @@ void sja1000p_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj) /** * sja1000p_irq_handler: - interrupt service routine * @irq: interrupt vector number, this value is system specific - * @dev_id: driver private pointer registered at time of request_irq() call. - * The CAN driver uses this pointer to store relationship of interrupt - * to chip state structure - @struct chip_t - * @regs: system dependent value pointing to registers stored in exception frame + * @chip: pointer to chip state structure * * Interrupt handler is activated when state of CAN controller chip changes, * there is message to be read or there is more space for new messages or @@ -575,80 +640,100 @@ void sja1000p_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj) * message queues. * File: src/sja1000p.c */ -irqreturn_t sja1000p_irq_handler(int irq, void *dev_id, struct pt_regs *regs) +int sja1000p_irq_handler(int irq, struct canchip_t *chip) { int irq_register, status, error_code; - int static retransmitted=0; /* FIXME - should go into chip struct */ - struct chip_t *chip=(struct chip_t *)dev_id; struct msgobj_t *obj=chip->msgobj[0]; + int loop_cnt=CHIP_MAX_IRQLOOP; irq_register=can_read_reg(chip,SJAIR); // DEBUGMSG("sja1000_irq_handler: SJAIR:%02x\n",irq_register); // DEBUGMSG("sja1000_irq_handler: SJASR:%02x\n", // can_read_reg(chip,SJASR)); - if ((irq_register & (IR_BEI|IR_EPI|IR_DOI|IR_EI|IR_TI|IR_RI)) == 0) - return IRQ_NONE; + if ((irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI)) == 0) + return CANCHIP_IRQ_NONE; - if(!obj->flags & OBJ_BUFFERS_ALLOCATED) { - CANMSG("sja1000p_irq_handler: called with device closed, irq_register 0x%02x\n", irq_register); - return IRQ_NONE; + if(!(chip->flags&CHIP_CONFIGURED)) { + CANMSG("sja1000p_irq_handler: called for non-configured device, irq_register 0x%02x\n", irq_register); + return CANCHIP_IRQ_NONE; } - if ((irq_register & IR_RI) != 0) { - DEBUGMSG("sja1000_irq_handler: RI\n"); - sja1000p_read(chip,obj); - obj->ret = 0; - } - if ((irq_register & IR_TI) != 0) { - DEBUGMSG("sja1000_irq_handler: TI\n"); - obj->ret = 0; - set_bit(OBJ_TX_REQUEST,&obj->flags); - while(!test_and_set_bit(OBJ_TX_LOCK,&obj->flags)){ - clear_bit(OBJ_TX_REQUEST,&obj->flags); - - if (can_read_reg(chip, SJASR) & SR_TBS) - sja1000p_irq_write_handler(chip, obj); - - clear_bit(OBJ_TX_LOCK,&obj->flags); - if(!test_bit(OBJ_TX_REQUEST,&obj->flags)) break; - DEBUGMSG("TX looping in sja1000_irq_handler\n"); + status=can_read_reg(chip,SJASR); + + do { + + if(!loop_cnt--) { + CANMSG("sja1000p_irq_handler IRQ %d stuck\n",irq); + return CANCHIP_IRQ_STUCK; } - } - if ((irq_register & (IR_EI|IR_BEI|IR_EPI|IR_DOI)) != 0) { - // Some error happened - status=can_read_reg(chip,SJASR); - error_code=can_read_reg(chip,SJAECC); - CANMSG("Error: status register: 0x%x irq_register: 0x%02x error: 0x%02x\n", - status, irq_register, error_code); + + /* (irq_register & sjaIR_RI) */ + /* old variant using SJAIR, collides with intended use with irq_accept */ + if (status & sjaSR_RBS) { + DEBUGMSG("sja1000_irq_handler: RI or RBS\n"); + sja1000p_read(chip,obj); + obj->ret = 0; + } + + /* (irq_register & sjaIR_TI) */ + /* old variant using SJAIR, collides with intended use with irq_accept */ + if ((status & sjaSR_TBS) && can_msgobj_test_fl(obj,TX_PENDING)) { + DEBUGMSG("sja1000_irq_handler: TI or TX_PENDING and TBS\n"); + obj->ret = 0; + can_msgobj_set_fl(obj,TX_REQUEST); + while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){ + can_msgobj_clear_fl(obj,TX_REQUEST); + + if (can_read_reg(chip, SJASR) & sjaSR_TBS) + sja1000p_irq_write_handler(chip, obj); + + can_msgobj_clear_fl(obj,TX_LOCK); + if(!can_msgobj_test_fl(obj,TX_REQUEST)) break; + DEBUGMSG("TX looping in sja1000_irq_handler\n"); + } + } + if ((irq_register & (sjaIR_EI|sjaIR_BEI|sjaIR_EPI|sjaIR_DOI)) != 0) { + // Some error happened + error_code=can_read_reg(chip,SJAECC); + CANMSG("Error: status register: 0x%x irq_register: 0x%02x error: 0x%02x\n", + status, irq_register, error_code); // FIXME: chip should be brought to usable state. Transmission cancelled if in progress. // Reset flag set to 0 if chip is already off the bus. Full state report obj->ret=-1; - if(error_code == 0xd9) { - obj->ret= -ENXIO; - /* no such device or address - no ACK received */ - } - if(retransmitted++>MAX_RETR) { - can_write_reg(chip, CMR_AT, SJACMR); // cancel any transmition - retransmitted = 0; - } - if(status&SR_BS) { - CANMSG("bus-off, resetting sja1000p\n"); - can_write_reg(chip, 0, SJAMOD); - } - - if(obj->tx_slot){ - canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_BUS); - /*canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot); - obj->tx_slot=NULL;*/ + if(error_code == 0xd9) { + obj->ret= -ENXIO; + /* no such device or address - no ACK received */ + } + if(obj->tx_retry_cnt++>MAX_RETR) { + can_write_reg(chip, sjaCMR_AT, SJACMR); // cancel any transmition + obj->tx_retry_cnt = 0; + } + if(status&sjaSR_BS) { + CANMSG("bus-off, resetting sja1000p\n"); + can_write_reg(chip, 0, SJAMOD); + } + + if(obj->tx_slot){ + canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_BUS); + /*canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot); + obj->tx_slot=NULL;*/ + } + + } else { + obj->tx_retry_cnt=0; } - } else { - retransmitted=0; - } + irq_register=can_read_reg(chip,SJAIR); + + status=can_read_reg(chip,SJASR); - return IRQ_HANDLED; + } while((irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI)) || + ((status & sjaSR_TBS) && can_msgobj_test_fl(obj,TX_PENDING)) || + (status & sjaSR_RBS)); + + return CANCHIP_IRQ_HANDLED; } /** @@ -656,32 +741,33 @@ irqreturn_t sja1000p_irq_handler(int irq, void *dev_id, struct pt_regs *regs) * @chip: pointer to chip state structure * @obj: pointer to message object structure * + * Function is responsible for initiating message transmition. + * It is responsible for clearing of object TX_REQUEST flag + * * Return Value: negative value reports error. * File: src/sja1000p.c */ -int sja1000p_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj) +int sja1000p_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj) { - /* dummy lock to prevent preemption fully portable way */ - spinlock_t dummy_lock; - /* preempt_disable() */ - spin_lock_init(&dummy_lock); - spin_lock(&dummy_lock); + can_preempt_disable(); - set_bit(OBJ_TX_REQUEST,&obj->flags); - while(!test_and_set_bit(OBJ_TX_LOCK,&obj->flags)){ - clear_bit(OBJ_TX_REQUEST,&obj->flags); + can_msgobj_set_fl(obj,TX_PENDING); + can_msgobj_set_fl(obj,TX_REQUEST); + while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){ + can_msgobj_clear_fl(obj,TX_REQUEST); - if (can_read_reg(chip, SJASR) & SR_TBS) + if (can_read_reg(chip, SJASR) & sjaSR_TBS){ + obj->tx_retry_cnt=0; sja1000p_irq_write_handler(chip, obj); + } - clear_bit(OBJ_TX_LOCK,&obj->flags); - if(!test_bit(OBJ_TX_REQUEST,&obj->flags)) break; + can_msgobj_clear_fl(obj,TX_LOCK); + if(!can_msgobj_test_fl(obj,TX_REQUEST)) break; DEBUGMSG("TX looping in sja1000p_wakeup_tx\n"); } - /* preempt_enable(); */ - spin_unlock(&dummy_lock); + can_preempt_enable(); return 0; } @@ -703,9 +789,28 @@ int sja1000p_register(struct chipspecops_t *chipspecops) chipspecops->remote_request=sja1000p_remote_request; chipspecops->enable_configuration=sja1000p_enable_configuration; chipspecops->disable_configuration=sja1000p_disable_configuration; + chipspecops->attach_to_chip=sja1000p_attach_to_chip; + chipspecops->release_chip=sja1000p_release_chip; chipspecops->set_btregs=sja1000p_set_btregs; chipspecops->start_chip=sja1000p_start_chip; chipspecops->stop_chip=sja1000p_stop_chip; chipspecops->irq_handler=sja1000p_irq_handler; + chipspecops->irq_accept=NULL; + return 0; +} + +/** + * sja1000p_fill_chipspecops - fills chip specific operations + * @chip: pointer to chip representation structure + * + * The function fills chip specific operations for sja1000 (PeliCAN) chip. + * + * Return Value: returns negative number in the case of fail + */ +int sja1000p_fill_chipspecops(struct canchip_t *chip) +{ + chip->chip_type="sja1000p"; + chip->max_objects=1; + sja1000p_register(chip->chipspecops); return 0; }