X-Git-Url: http://rtime.felk.cvut.cz/gitweb/lincan.git/blobdiff_plain/060d6f042deb8d82aaeb9de8701cd3405bb4c066..8c25832fed15843b3ca7cdda9c99e755f063196b:/embedded/app/usbcan/can/lpc17xx_can.h

diff --git a/embedded/app/usbcan/can/lpc17xx_can.h b/embedded/app/usbcan/can/lpc17xx_can.h
index dd3fdf2..d4683e5 100644
--- a/embedded/app/usbcan/can/lpc17xx_can.h
+++ b/embedded/app/usbcan/can/lpc17xx_can.h
@@ -17,6 +17,7 @@ extern "C"
 
 #define CAN1_REGS_BASE	0x40044000UL
 #define CAN2_REGS_BASE	0x40048000UL
+#define CANAF_REGS_BASE	0x4003C000UL
 
 #define CAN_MOD_o		0x0000
 #define CAN_CMR_o		0x0004
@@ -43,6 +44,16 @@ extern "C"
 #define CAN_TDA3_o		0x0058
 #define CAN_TDB3_o		0x005C
 
+
+#define CANAF_AFMR_o		0x0000
+#define CANAF_SFF_sa_o		0x0004
+#define CANAF_SFF_GRP_sa_o	0x0008
+#define CANAF_EFF_sa_o		0x000C
+#define CANAF_EFF_GRP_sa_o	0x0010
+#define CANAF_ENDofTable_o	0x0014
+#define CANAF_LUTerrAd_o	0x0018
+#define CANAF_LUTerr_o		0x001C
+
 //----------------------------------
 
 #define CAN1MOD			(*(uint32_t*)(CAN1_REGS_BASE+CAN_MOD_o))
@@ -71,12 +82,30 @@ extern "C"
 #define CAN1TDB3		(*(uint32_t*)(CAN1_REGS_BASE+CAN_TDB3_o))
 
 
+
+#define CANAF_AFMR				(*(uint32_t*)(CANAF_REGS_BASE+CANAF_AFMR_o))
+#define CANAF_SFF_sa			(*(uint32_t*)(CANAF_REGS_BASE+CANAF_SFF_sa_o))
+#define CANAF_SFF_GRP_sa		(*(uint32_t*)(CANAF_REGS_BASE+CANAF_SFF_GRP_sa_o))
+#define CANAF_EFF_sa			(*(uint32_t*)(CANAF_REGS_BASE+CANAF_EFF_sa_o))
+#define CANAF_EFF_GRP_sa		(*(uint32_t*)(CANAF_REGS_BASE+CANAF_EFF_GRP_sa_o))
+#define CANAF_ENDofTable		(*(uint32_t*)(CANAF_REGS_BASE+CANAF_ENDofTable_o))
+#define CANAF_LUTerrAd			(*(uint32_t*)(CANAF_REGS_BASE+CANAF_LUTerrAd_o))
+#define CANAF_LUTerr			(*(uint32_t*)(CANAF_REGS_BASE+CANAF_LUTerr_o))
+
 //----------------------------------
 
+//CAN Global Status Register
+#define CAN_GSR_BS		(1<<7)
+
 //CAN Interrupt and Capture Register bits
+#define CAN_ICR_RI		(1<<0)
 #define CAN_ICR_TI1		(1<<1)
+#define CAN_ICR_DOI		(1<<3) 
+#define CAN_ICR_IDI		(1<<8) 
 
 //CAN Status Register bits
+#define CAN_SR_RBS		(1<<0)
+#define CAN_SR_DOS		(1<<1) 
 #define CAN_SR_TBS1		(1<<2)		
 
 //CAN Command Register bits
@@ -90,8 +119,16 @@ extern "C"
 #define CAN_TFI1_RTR	(1<<30)
 #define CAN_TFI1_EXT	(1<<31)
 
+//CAN Receive Frame Status register
+#define CAN_RFS_RTR	(1<<30)
+#define CAN_RFS_EXT	(1<<31)
+
 //CAN Interrupt Enable Register bits
+#define CAN_IER_RIE		(1<<0) 
 #define CAN_IER_TIE1	(1<<1)
+#define CAN_IER_DOIE	(1<<3) 
+#define CAN_IER_IDIE	(1<<8) 
+
 
 //----------------------------------
 
@@ -117,6 +154,7 @@ extern "C"
 
 void CAN_init(uint32_t baudrate);
 void CAN_send(canmsg_t* msg);
+void CAN_recv(canmsg_t* msg);
 void CAN_IRQHandler(void);
 
 //----------------------------------
@@ -149,6 +187,7 @@ int lpc17xx_fill_chipspecops(struct canchip_t *chip);
 int lpc17xx_register(struct chipspecops_t *chipspecops);
 int lpc17xx_attach_to_chip(struct canchip_t *chip);
 int lpc17xx_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj);
+void lpc17xx_read(struct canchip_t *chip, struct msgobj_t *obj);
 
 #ifdef __cplusplus
 }