Update of system-less architecture and board support code to actual uLAN.sf.net version.

[lincan.git] / embedded / board / arm / ul_usb1 / libs / bspbase / bsp0hwinit.c

diff --git a/embedded/board/arm/ul_usb1/libs/bspbase/bsp0hwinit.c b/embedded/board/arm/ul_usb1/libs/bspbase/bsp0hwinit.c
index 468e1720372f0b531294c4a3cb6e7e787094f77a..90d05800fdaabc63c83672f7e1be3d2e6b5d812e 100644 (file)
--- a/embedded/board/arm/ul_usb1/libs/bspbase/bsp0hwinit.c
+++ b/embedded/board/arm/ul_usb1/libs/bspbase/bsp0hwinit.c
@@ -19,26 +19,27 @@
 #ifdef CONFIG_OC_I2C_DRV_SYSLESS
   #include <i2c_drv.h>
 #endif /* CONFIG_OC_I2C_DRV_SYSLESS */
+#ifdef CONFIG_OC_PBM_DRV
+  #include <pbmcore.h>
+  #include <pbm_8250.h>
+  #include <pbm_drv_init.h>
+#endif /* CONFIG_OC_PBM_DRV */
 #include <hal_machperiph.h>
 #include <hal_intr.h>
 
 /* timers */
 volatile lt_ticks_t sys_timer_ticks;
 
+#ifdef CONFIG_OC_I2C_DRV_SYSLESS
+#define I2C_DRV_NA_MSTIMEOUT    10
+i2c_drv_t i2c_drv;
+int i2c_drv_na_timer=0;
+#endif /* CONFIG_OC_I2C_DRV_SYSLESS */
+
 static void sysInit(void) 
 {
 
-  lpc_pll_off();
-  lpc_pll_on();
-
-  // setup & enable the MAM
-  MAMCR = 0;
-  MAMTIM = MAMTIM_CYCLES;
-  MAMCR = MAMCR_FULL;
-
-  // set the peripheral bus speed
-  // value computed from config.h
-  VPBDIV = VPBDIV_VALUE;                // set the peripheral bus clock speed
+  system_clock_init();
 
   // setup the parallel port pin
   IO0CLR = P0IO_ZERO_BITS;                // clear the ZEROs output
@@ -51,6 +52,8 @@ static void sysInit(void)
   IO1DIR = P1IO_OUTPUT_BITS;              // set the output bit direction
  #endif
 
+  PINSEL1 = (PINSEL1 & 0x3FFFFFFF);
+
   IO0CLR = LED1_BIT;                      // Indicate functional state on the LED1
 }
 
@@ -64,6 +67,24 @@ void timer0_isr(void)
       T0IR=TIR_MR0I;               // Clear match0 interrupt
      #ifdef CONFIG_OC_UL_DRV_SYSLESS
       uld_jiffies++;
+     #endif
+     #ifdef CONFIG_OC_PBM_DRV
+      pbm_jiffies++;
+     #endif
+     #ifdef CONFIG_OC_I2C_DRV_SYSLESS
+      if (i2c_drv.flags&I2C_DRV_MS_INPR) {
+        if (i2c_drv.flags&I2C_DRV_NA) {
+          i2c_drv_na_timer++;
+          if (i2c_drv_na_timer>I2C_DRV_NA_MSTIMEOUT) {
+             if (i2c_drv.stroke_fnc) 
+              i2c_drv.stroke_fnc(&i2c_drv);
+            i2c_drv_na_timer=0;
+          }
+        } else {
+          i2c_drv_na_timer=0;
+        }
+        i2c_drv.flags|=I2C_DRV_NA;
+      }
      #endif
       sys_timer_ticks++;
     } while (((int32_t)(T0MR0-T0TC))<0);
@@ -157,7 +178,7 @@ int ul_iac_call_rdm(struct ul_drv *udrv,ul_msginfo *msginfo,char *ibuff,ul_iac_d
 
   if (mtype==0x00) {
     data->len=len;
-    data->buff=(unsigned char*)start;
+    data->buff=(char*)start;
     return UL_IAC_RC_FREEMSG;
   }
   return UL_IAC_RC_PROC;
@@ -286,11 +307,11 @@ int uLanInit()
   if (udrv==NULL)
     return -1;
 
-  ul_drv_add_iac(udrv,UL_CMD_RDM,UL_IAC_OP_SND,ul_iac_call_rdm,NULL,0,0,NULL);
-  ul_drv_add_iac(udrv,UL_CMD_ERM,UL_IAC_OP_CALLBACK,ul_iac_call_erm,NULL,0,0,NULL);
-  ul_drv_add_iac(udrv,UL_CMD_WRM,UL_IAC_OP_REC,ul_iac_call_wrm,(char*)lpciap_buff,0,0,NULL);
-  ul_drv_add_iac(udrv,UL_CMD_DEB,UL_IAC_OP_CALLBACK,ul_iac_call_deb,NULL,0,0,NULL); 
-  ul_drv_add_iac(udrv,UL_CMD_RES,UL_IAC_OP_CALLBACK,ul_iac_call_res,NULL,0,0,NULL); 
+  ul_drv_add_iac(udrv,UL_CMD_RDM,UL_IAC_OP_SND,ul_iac_call_rdm,NULL,0,0,NULL,0);
+  ul_drv_add_iac(udrv,UL_CMD_ERM,UL_IAC_OP_CALLBACK,ul_iac_call_erm,NULL,0,UL_IAC_BFL_CB_OFFLT,NULL,0);
+  ul_drv_add_iac(udrv,UL_CMD_WRM,UL_IAC_OP_REC,ul_iac_call_wrm,(char*)lpciap_buff,0,UL_IAC_BFL_CB_OFFLT,NULL,0);
+  ul_drv_add_iac(udrv,UL_CMD_DEB,UL_IAC_OP_CALLBACK,ul_iac_call_deb,NULL,0,UL_IAC_BFL_CB_OFFLT,NULL,0); 
+  ul_drv_add_iac(udrv,UL_CMD_RES,UL_IAC_OP_CALLBACK,ul_iac_call_res,NULL,0,UL_IAC_BFL_CB_OFFLT,NULL,0); 
 
   return ul_drv_add_dev(udrv);
 }
@@ -298,14 +319,18 @@ int uLanInit()
 
 #ifdef CONFIG_OC_I2C_DRV_SYSLESS
 
-i2c_drv_t i2c_drv;
-
 int
 i2cInit(void)
 {
 
   /* set io pins */
-  PINSEL0 = (PINSEL0 & ~0x000000F0) | 0x00000050; /* I2C - SCL, SDA */
+ #if (I2C_DRV_SYSLESS_IRQ==9)
+  PINSEL0 = (PINSEL0 & ~0x000000F0) | 0x00000050; /* I2C0 - SCL0, SDA0 */
+ #elif (I2C_DRV_SYSLESS_IRQ==19)
+  PINSEL0 = (PINSEL0 & ~0x30C00000) | 0x30C00000; /* I2C1 - SCL1, SDA1 */
+ #else
+   #error "wrong I2C pin maping!"
+ #endif
 
   if (i2c_drv_init(&i2c_drv, 
                I2C_DRV_SYSLESS_PORT,
@@ -318,6 +343,55 @@ i2cInit(void)
 
 #endif /*CONFIG_OC_I2C_DRV_SYSLESS*/
 
+#ifdef CONFIG_OC_PBM_DRV
+
+void pbm_drv_init()
+{
+       int rv = 0;
+
+       /* set rs485 mode for UART1 */
+       /* dsr(txd), cts(rxd), rts(rs485_dir), rxd, txd */
+       PINSEL0 = (PINSEL0 & ~0xFFFF0000) | 0x01550000;
+
+       PBMCHIP_INFO(PBMCHIP_DRV_DESCRIPTION ", "
+                       PBMCHIP_DRV_VERSION ", "
+                       PBMCHIP_DRV_COPYRIGHT "\n");
+
+       pbm_dev = pbm_alloc_dev(PBM_UART);
+       if (!pbm_dev)
+               PBM_PRINT("unable to allocate device\n");
+
+       PBM_LOCK_INIT(&pbm_dev->lock);
+       PBM_LOCK_INIT(&pbm_dev->irq_lock);
+
+       pbm_dev->node_res = &pbm_8250_res;
+       pbm_8250_res.ioport = PBM_8250_PORT;
+       pbm_8250_res.irq = PBM_8250_IRQ;
+       PBMCHIP_INFO("port=0x%04x irq=%d\n",
+                       pbm_8250_res.ioport, pbm_8250_res.irq);
+
+       /* disable all interrupts */
+       pbm_outb(pbm_dev, UART_IER, 0x00);
+
+       /* get default parameters*/
+       pbm_8250_get_params(pbm_dev, 0);
+       /* chip operations and registering to pbmcore */
+       pbm_dev->chops = chops;
+       rv = pbm_register_chip(pbm_dev);
+       if (rv)
+               PBM_PRINT("unable to register chip\n");
+
+       rv = request_irq(pbm_8250_res.irq, pbm_8250_intr, 0, "pbm_8250", pbm_dev);
+
+       pbm_8250_int_off_all(pbm_dev);
+       pbm_8250_int_on_all(pbm_dev);
+
+       /* a hack to generate THRE interrupt on LPC2148 */
+       pbm_outb(pbm_dev, UART_TX, 0x00);
+}
+
+#endif /* CONFIG_OC_PBM_DRV */
+
 void _setup_board()
 {
   // initialize the system
@@ -344,4 +418,9 @@ void _setup_board()
   #ifdef CONFIG_OC_I2C_DRV_SYSLESS
     i2cInit();
   #endif /* CONFIG_OC_I2C_DRV_SYSLESS */
+
+  #ifdef CONFIG_OC_PBM_DRV
+    pbm_drv_init();
+  #endif /* CONFIG_OC_PBM_DRV */
+
 }