]> rtime.felk.cvut.cz Git - lincan.git/blobdiff - lincan/src/pcccan.c
Added individual Kconfig for CAN and ORTE components.
[lincan.git] / lincan / src / pcccan.c
index 64e6b700a9fd55c4cc9831d4222d0fbce5c9f1ed..ebf315c82e54e685f11e984758b5b4e48d2f9c36 100644 (file)
@@ -20,6 +20,8 @@
 int pcccan_irq=-1;
 unsigned long pcccan_base=0x0;
 
+static can_spinlock_t pcccan_port_lock=SPIN_LOCK_UNLOCKED;
+
 /*
  * IO_RANGE is the io-memory range that gets reserved, please adjust according
  * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
@@ -253,10 +255,11 @@ int pcccan_program_irq(struct candevice_t *candev)
  */
 void pcccan_write_register(unsigned char data, unsigned long address)
 {
-       can_disable_irq(pcccan_irq);
+       can_spin_irqflags_t flags;
+       can_spin_lock_irqsave(&pcccan_port_lock,flags);
        outb(address - pcccan_base, pcccan_base+1);
        outb(data, pcccan_base+6);
-       can_enable_irq(pcccan_irq);
+       can_spin_unlock_irqrestore(&pcccan_port_lock,flags);
 }
 
 /**
@@ -272,10 +275,11 @@ void pcccan_write_register(unsigned char data, unsigned long address)
 unsigned pcccan_read_register(unsigned long address)
 {
        unsigned ret;
-       can_disable_irq(pcccan_irq);
+       can_spin_irqflags_t flags;
+       can_spin_lock_irqsave(&pcccan_port_lock,flags);
        outb(address - pcccan_base, pcccan_base+1);
        ret=inb(pcccan_base+2);
-       can_enable_irq(pcccan_irq);
+       can_spin_unlock_irqrestore(&pcccan_port_lock,flags);
        return ret;
 
 }