]> rtime.felk.cvut.cz Git - lincan.git/blobdiff - embedded/app/usbcan/can/lpc17xx_can.h
Used sysless functions for IRQ handling. Used access functions to the chip register...
[lincan.git] / embedded / app / usbcan / can / lpc17xx_can.h
index 1b66997c7b4a65b17b53ae659a427101bbf87be1..0e137a991ba489691e7c3c92a965fa5265781aac 100644 (file)
@@ -5,6 +5,8 @@
 #include "hal_machperiph.h"
 #include "cpu_def.h"
 #include "system_def.h"
+
+#include "can/can.h"
 #include "can/canmsg.h"
 
 #ifdef __cplusplus
@@ -15,6 +17,7 @@ extern "C"
 
 #define CAN1_REGS_BASE 0x40044000UL
 #define CAN2_REGS_BASE 0x40048000UL
+#define CANAF_REGS_BASE        0x4003C000UL
 
 #define CAN_MOD_o              0x0000
 #define CAN_CMR_o              0x0004
@@ -41,42 +44,94 @@ extern "C"
 #define CAN_TDA3_o             0x0058
 #define CAN_TDB3_o             0x005C
 
-//----------------------------------
 
-#define CAN1MOD                        (*(uint32_t*)(CAN1_REGS_BASE+CAN_MOD_o))
-#define CAN1CMR                        (*(uint32_t*)(CAN1_REGS_BASE+CAN_CMR_o))
-#define CAN1GSR                        (*(uint32_t*)(CAN1_REGS_BASE+CAN_GSR_o))
-#define CAN1ICR                        (*(uint32_t*)(CAN1_REGS_BASE+CAN_ICR_o))
-#define CAN1IER                        (*(uint32_t*)(CAN1_REGS_BASE+CAN_IER_o))
-#define CAN1BTR                        (*(uint32_t*)(CAN1_REGS_BASE+CAN_BTR_o))
-#define CAN1EWL                        (*(uint32_t*)(CAN1_REGS_BASE+CAN_EWL_o))
-#define CAN1SR                 (*(uint32_t*)(CAN1_REGS_BASE+CAN_SR_o))
-#define CAN1RFS                        (*(uint32_t*)(CAN1_REGS_BASE+CAN_RFS_o))
-#define CAN1RID                        (*(uint32_t*)(CAN1_REGS_BASE+CAN_RID_o))
-#define CAN1RDA                        (*(uint32_t*)(CAN1_REGS_BASE+CAN_RDA_o))
-#define CAN1RDB                        (*(uint32_t*)(CAN1_REGS_BASE+CAN_RDB_o))
-#define CAN1TFI1               (*(uint32_t*)(CAN1_REGS_BASE+CAN_TFI1_o))
-#define CAN1TID1               (*(uint32_t*)(CAN1_REGS_BASE+CAN_TID1_o))
-#define CAN1TDA1               (*(uint32_t*)(CAN1_REGS_BASE+CAN_TDA1_o))
-#define CAN1TDB1               (*(uint32_t*)(CAN1_REGS_BASE+CAN_TDB1_o))
-#define CAN1TFI2               (*(uint32_t*)(CAN1_REGS_BASE+CAN_TFI2_o))
-#define CAN1TID2               (*(uint32_t*)(CAN1_REGS_BASE+CAN_TID2_o))
-#define CAN1TDA2               (*(uint32_t*)(CAN1_REGS_BASE+CAN_TDA2_o))
-#define CAN1TDB2               (*(uint32_t*)(CAN1_REGS_BASE+CAN_TDB2_o))
-#define CAN1TFI3               (*(uint32_t*)(CAN1_REGS_BASE+CAN_TFI3_o))
-#define CAN1TID3               (*(uint32_t*)(CAN1_REGS_BASE+CAN_TID3_o))
-#define CAN1TDA3               (*(uint32_t*)(CAN1_REGS_BASE+CAN_TDA3_o))
-#define CAN1TDB3               (*(uint32_t*)(CAN1_REGS_BASE+CAN_TDB3_o))
+#define CANAF_AFMR_o           0x0000
+#define CANAF_SFF_sa_o         0x0004
+#define CANAF_SFF_GRP_sa_o     0x0008
+#define CANAF_EFF_sa_o         0x000C
+#define CANAF_EFF_GRP_sa_o     0x0010
+#define CANAF_ENDofTable_o     0x0014
+#define CANAF_LUTerrAd_o       0x0018
+#define CANAF_LUTerr_o         0x001C
 
+//----------------------------------
+
+#define CAN1MOD                        (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_MOD_o))
+#define CAN1CMR                        (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_CMR_o))
+#define CAN1GSR                        (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_GSR_o))
+#define CAN1ICR                        (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_ICR_o))
+#define CAN1IER                        (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_IER_o))
+#define CAN1BTR                        (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_BTR_o))
+#define CAN1EWL                        (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_EWL_o))
+#define CAN1SR                 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_SR_o))
+#define CAN1RFS                        (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_RFS_o))
+#define CAN1RID                        (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_RID_o))
+#define CAN1RDA                        (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_RDA_o))
+#define CAN1RDB                        (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_RDB_o))
+#define CAN1TFI1               (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TFI1_o))
+#define CAN1TID1               (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TID1_o))
+#define CAN1TDA1               (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDA1_o))
+#define CAN1TDB1               (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDB1_o))
+#define CAN1TFI2               (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TFI2_o))
+#define CAN1TID2               (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TID2_o))
+#define CAN1TDA2               (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDA2_o))
+#define CAN1TDB2               (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDB2_o))
+#define CAN1TFI3               (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TFI3_o))
+#define CAN1TID3               (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TID3_o))
+#define CAN1TDA3               (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDA3_o))
+#define CAN1TDB3               (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDB3_o))
+
+
+
+#define CANAF_AFMR                             (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_AFMR_o))
+#define CANAF_SFF_sa                   (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_SFF_sa_o))
+#define CANAF_SFF_GRP_sa               (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_SFF_GRP_sa_o))
+#define CANAF_EFF_sa                   (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_EFF_sa_o))
+#define CANAF_EFF_GRP_sa               (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_EFF_GRP_sa_o))
+#define CANAF_ENDofTable               (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_ENDofTable_o))
+#define CANAF_LUTerrAd                 (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_LUTerrAd_o))
+#define CANAF_LUTerr                   (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_LUTerr_o))
 
 //----------------------------------
 
-#define PCONP SC->PCONP
-#define PCLKSEL0 SC->PCLKSEL0 
+//CAN Global Status Register
+#define CAN_GSR_BS             (1<<7)
+
+//CAN Interrupt and Capture Register bits
+#define CAN_ICR_RI             (1<<0)
+#define CAN_ICR_TI1            (1<<1)
+#define CAN_ICR_DOI            (1<<3) 
+#define CAN_ICR_IDI            (1<<8) 
+
+//CAN Status Register bits
+#define CAN_SR_RBS             (1<<0)
+#define CAN_SR_DOS             (1<<1) 
+#define CAN_SR_TBS1            (1<<2)          
+
+//CAN Command Register bits
+#define CAN_CMR_TR             (1<<0)
+#define CAN_CMR_AT             (1<<1)
+#define CAN_CMR_RRB            (1<<2)
+#define CAN_CMR_CDO            (1<<3)
+#define CAN_CMR_STB1   (1<<5)
+
+//CAN Transmit Frame Information register 1 bits
+#define CAN_TFI1_RTR   (1<<30)
+#define CAN_TFI1_EXT   (1<<31)
+
+//CAN Receive Frame Status register
+#define CAN_RFS_RTR    (1<<30)
+#define CAN_RFS_EXT    (1<<31)
+
+//CAN Interrupt Enable Register bits
+#define CAN_IER_RIE            (1<<0) 
+#define CAN_IER_TIE1   (1<<1)
+#define CAN_IER_DOIE   (1<<3) 
+#define CAN_IER_IDIE   (1<<8) 
+
+
+//----------------------------------
 
-#define PINSEL0 PINCON->PINSEL0
-#define PINMODE0 PINCON->PINMODE0
-#define PINMODE_OD0 PINCON->PINMODE_OD0
 
 #define PCCAN1 (1<<13) // CAN Controller 1 power/clock control bit. 
 #define PCCAN2 (1<<14) // CAN Controller 2 power/clock control bit. 
@@ -91,8 +146,43 @@ extern "C"
 // CAN1_RX_BIT a CAN1_TX_BIT jiz definovany v system_def.h
 
 
-void CAN_init(uint32_t baudrate);
-void CAN_send(canmsg_t* msg);
+void CAN_init(struct canchip_t *chip);
+void CAN_send(struct canchip_t *chip, canmsg_t* msg);
+void CAN_recv(struct canchip_t *chip, canmsg_t* msg);
+void CAN_IRQHandler(void);
+
+//----------------------------------
+
+struct can_lmc1_chip_data
+{
+       int flags;
+};
+
+// board can-lmc1 specific functions:
+int can_lmc1_register(struct hwspecops_t *hwspecops);
+int can_lmc1_init_hw_data(struct candevice_t *candev);
+int can_lmc1_init_chip_data(struct candevice_t *candev, int chipnr);
+int can_lmc1_init_obj_data(struct canchip_t *chip, int objnr);
+void can_lmc1_write_register(unsigned data, unsigned long address);
+unsigned can_lmc1_read_register(unsigned long address);
+int can_lmc1_request_io(struct candevice_t *candev);
+int can_lmc1_reset(struct candevice_t *candev);
+int can_lmc1_program_irq(struct candevice_t *candev);
+
+// lpc17xx can chip specific functions:
+int lpc17xx_chip_config(struct canchip_t *chip);
+int lpc17xx_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
+                                                       struct canmsg_t *msg);
+int lpc17xx_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
+                                                       struct canmsg_t *msg);
+int lpc17xx_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj);
+int lpc17xx_irq_handler(int irq, struct canchip_t *chip);
+void lpc17xx_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj);
+int lpc17xx_fill_chipspecops(struct canchip_t *chip);
+int lpc17xx_register(struct chipspecops_t *chipspecops);
+int lpc17xx_attach_to_chip(struct canchip_t *chip);
+int lpc17xx_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj);
+void lpc17xx_read(struct canchip_t *chip, struct msgobj_t *obj);
 
 #ifdef __cplusplus
 }