/* nsi.c
* Linux CAN-bus device driver.
* Written by Arnaud Westenberg email:arnaud@wanadoo.nl
+ * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
+ * email:pisa@cmp.felk.cvut.cz
* This software is released under the GPL-License.
- * Version 0.7 6 Aug 2001
+ * Version lincan-0.2 9 Jul 2003
*/
#include <linux/autoconf.h>
-#if defined (CONFIG_MODVERSIONS) && !defined (MODVERSIONS)
-#define MODVERSIONS
-#endif
-
-#if defined (MODVERSIONS)
-#include <linux/modversions.h>
-#endif
#include <linux/ioport.h>
#include <linux/delay.h>
/* The function template_request_io is used to reserve the io-memory. If your
* hardware uses a dedicated memory range as hardware control registers you
* will have to add the code to reserve this memory as well.
- * The reserved memory starts at io_addr, wich is the module parameter io.
+ * The reserved memory starts at candev->io_addr, wich is the module parameter io.
*/
-int nsi_request_io(unsigned long io_addr)
+int nsi_request_io(struct candevice_t *candev)
{
- if (check_region(io_addr,IO_RANGE)) {
- CANMSG("Unable to open port: 0x%lx\n",io_addr);
+ if (!can_request_io_region(candev->io_addr,IO_RANGE,DEVICE_NAME)) {
+ CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
return -ENODEV;
- }
- else {
- request_region(io_addr,IO_RANGE,DEVICE_NAME);
- DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", io_addr,
- io_addr + IO_RANGE - 1);
+ } else {
+ DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr,
+ candev->io_addr + IO_RANGE - 1);
}
return 0;
}
/* The function template_release_io is used to free the previously reserved
* io-memory. In case you reserved more memory, don't forget to free it here.
*/
-int nsi_release_io(unsigned long io_addr)
+int nsi_release_io(struct candevice_t *candev)
{
- release_region(io_addr,IO_RANGE);
+ can_release_io_region(candev->io_addr,IO_RANGE);
return 0;
}
* hardware specific so I haven't included example code. Don't forget to check
* the reset status of the chip before returning.
*/
-int nsi_reset(int card)
+int nsi_reset(struct candevice_t *candev)
{
int i;
DEBUGMSG("Resetting nsi hardware ...\n");
/* we don't use template_write_register because we don't use the two first
register of the card but the third in order to make a hard reset */
- outb (1, nsican_base + candevices_p[card]->res_addr);
- outb (0, nsican_base + candevices_p[card]->res_addr);
+ outb (1, nsican_base + candev->res_addr);
+ outb (0, nsican_base + candev->res_addr);
for (i = 1; i < 1000; i++)
udelay (1000);
#define NR_82527 1
#define NR_SJA1000 0
-int nsi_init_hw_data(int card)
+int nsi_init_hw_data(struct candevice_t *candev)
{
- candevices_p[card]->res_addr=RESET_ADDR;
- candevices_p[card]->nr_82527_chips=1;
- candevices_p[card]->nr_sja1000_chips=0;
- candevices_p[card]->flags |= PROGRAMMABLE_IRQ;
+ candev->res_addr=RESET_ADDR;
+ candev->nr_82527_chips=1;
+ candev->nr_sja1000_chips=0;
+ candev->nr_all_chips=1;
+ candev->flags |= PROGRAMMABLE_IRQ;
return 0;
}
* CHIP_TYPE represents the type of CAN chip. CHIP_TYPE can be "i82527" or
* "sja1000".
* The chip_base_addr entry represents the start of the 'official' memory map
- * of the installed chip. It's likely that this is the same as the io_addr
+ * of the installed chip. It's likely that this is the same as the candev->io_addr
* argument supplied at module loading time.
* The clock argument holds the chip clock value in Hz.
*/
#define CHIP_TYPE "i82527"
-int nsi_init_chip_data(int card, int chipnr)
+int nsi_init_chip_data(struct candevice_t *candev, int chipnr)
{
- candevices_p[card]->chip[chipnr]->chip_type=CHIP_TYPE;
- candevices_p[card]->chip[chipnr]->chip_base_addr=
- candevices_p[card]->io_addr;
- candevices_p[card]->chip[chipnr]->clock = 16000000;
- nsican_irq=candevices_p[card]->chip[chipnr]->chip_irq;
- nsican_base=candevices_p[card]->chip[chipnr]->chip_base_addr;
- candevices_p[card]->chip[chipnr]->int_cpu_reg = iCPU_DSC;
- candevices_p[card]->chip[chipnr]->int_clk_reg = iCLK_SL1;
- candevices_p[card]->chip[chipnr]->int_bus_reg = iBUS_CBY;
+ candev->chip[chipnr]->chip_type=CHIP_TYPE;
+ candev->chip[chipnr]->chip_base_addr=
+ candev->io_addr;
+ candev->chip[chipnr]->clock = 16000000;
+ nsican_irq=candev->chip[chipnr]->chip_irq;
+ nsican_base=candev->chip[chipnr]->chip_base_addr;
+ candev->chip[chipnr]->int_cpu_reg = iCPU_DSC;
+ candev->chip[chipnr]->int_clk_reg = iCLK_SL1;
+ candev->chip[chipnr]->int_bus_reg = iBUS_CBY;
return 0;
}
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
*/
-int nsi_init_obj_data(int chipnr, int objnr)
+int nsi_init_obj_data(struct chip_t *chip, int objnr)
{
- chips_p[chipnr]->msgobj[objnr]->obj_base_addr=
- chips_p[chipnr]->chip_base_addr+(objnr+1)*0x10;
- chips_p[chipnr]->msgobj[objnr]->flags=0;
+ chip->msgobj[objnr]->obj_base_addr=
+ chip->chip_base_addr+(objnr+1)*0x10;
+ chip->msgobj[objnr]->flags=0;
return 0;
}
* function unedited. Again this function is hardware specific so there's no
* example code.
*/
-int nsi_program_irq(int card)
+int nsi_program_irq(struct candevice_t *candev)
{
return 0;
}