]> rtime.felk.cvut.cz Git - lincan.git/blobdiff - lincan/src/msmcan.c
Updated Intel 82527 support and added feeding of MSMCAN secret and hidden watchdog.
[lincan.git] / lincan / src / msmcan.c
index e9f68f56f3e7a991d17bddb8d9f4e7e2e788a6ea..1d6fb517ea9839b4e75a0db5b805713f08da3b54 100644 (file)
@@ -63,6 +63,27 @@ int msmcan_reset(struct candevice_t *candev)
           registers of the card but the third in order to make a hard reset */
        /* outb (1, msmcan_base + candev->res_addr); */
 
+
+       /* terrible MSMCAN reset design - best to comment out */
+       if(0) {
+               int tic=jiffies;
+               int tac;
+               
+               msmcan_write_register(iCTL_INI, chip->chip_base_addr+iCTL);
+               /*CLKOUT stopped (iCPU_CEN=0) */
+               msmcan_write_register(iCPU_DSC, chip->chip_base_addr+iCPU);
+               while(!(msmcan_read_register(chip->chip_base_addr+iCPU)&iCPU_CEN)){
+                       tac=jiffies;
+                       if((tac-tic)>HZ*2){
+                               CANMSG("Unable to reset board\n");
+                               return -EIO;
+                       }
+                       schedule();
+               }
+               
+       
+       }
+
        can_disable_irq(chip->chip_irq);
        msmcan_write_register(iCTL_INI, chip->chip_base_addr+iCTL);
        can_enable_irq(chip->chip_irq);
@@ -110,7 +131,8 @@ int msmcan_init_chip_data(struct candevice_t *candev, int chipnr)
        candev->chip[chipnr]->chip_base_addr=
            candev->io_addr << 16;
        candev->chip[chipnr]->clock = 16000000;
-       candev->chip[chipnr]->int_cpu_reg = iCPU_DSC;
+       /* The CLKOUT has to be enabled to reset MSMCAN MAX1232 watchdog */
+       candev->chip[chipnr]->int_cpu_reg = iCPU_DSC | iCPU_CEN;
        candev->chip[chipnr]->int_clk_reg = iCLK_SL1;
        candev->chip[chipnr]->int_bus_reg = iBUS_CBY;