The first round of I/O space pointers separation.

[lincan.git] / lincan / src / ems_cpcpci.c

diff --git a/lincan/src/ems_cpcpci.c b/lincan/src/ems_cpcpci.c
index d20e2816696ca0ce089275ef87e1c99a33f22e49..ffbf76aeb2ac5e5738a5df2614b91a069a18ae79 100644 (file)
--- a/lincan/src/ems_cpcpci.c
+++ b/lincan/src/ems_cpcpci.c
@@ -71,13 +71,13 @@ The board configuration is probably following:
 void ems_cpcpci_disconnect_irq(struct candevice_t *candev)
 {
        /* Disable interrupts from card */
-       writel(0, candev->dev_base_addr + PITA2_ICR);
+       can_writel(0, candev->aux_base_addr + PITA2_ICR);
 }
 
 void ems_cpcpci_connect_irq(struct candevice_t *candev)
 {
        /* Enable interrupts from card */
-       writel(PITA2_ICR_INT0_En, candev->dev_base_addr + PITA2_ICR);
+       can_writel(PITA2_ICR_INT0_En, candev->aux_base_addr + PITA2_ICR);
 }
 
 
@@ -103,20 +103,21 @@ int ems_cpcpci_request_io(struct candevice_t *candev)
     #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
 
        pita2_addr=pci_resource_start(candev->sysdevptr.pcidev,0);
-       if (!(candev->dev_base_addr = (long) ioremap(pita2_addr, 
+       if (!(candev->aux_base_addr = ioremap(pita2_addr, 
              pci_resource_len(candev->sysdevptr.pcidev,0)))) {
                CANMSG("Unable to access I/O memory at: 0x%lx\n", pita2_addr);
                goto error_ioremap_pita2;
        }
 
        io_addr=pci_resource_start(candev->sysdevptr.pcidev,1);;
-       if (!(candev->io_addr = (long) ioremap(io_addr,
+       if (!(candev->dev_base_addr = ioremap(io_addr,
              pci_resource_len(candev->sysdevptr.pcidev,1)))) {
                CANMSG("Unable to access I/O memory at: 0x%lx\n", io_addr);
                goto error_ioremap_io;
        }
 
-       candev->res_addr=candev->io_addr;
+       candev->io_addr=io_addr;
+       candev->res_addr=pita2_addr;
        
        /* 
         * this is redundant with chip initialization, but remap address 
@@ -125,21 +126,21 @@ int ems_cpcpci_request_io(struct candevice_t *candev)
        for(i=0;i<candev->nr_all_chips;i++) {
                struct canchip_t *chip=candev->chip[i];
                if(!chip) continue;
-               chip->chip_base_addr = candev->io_addr+
+               chip->chip_base_addr = candev->dev_base_addr+
                        0x400 + i*EMS_CPCPCI_BYTES_PER_CIRCUIT;
                if(!chip->msgobj[0]) continue;
                chip->msgobj[0]->obj_base_addr=chip->chip_base_addr;
        }
 
        /* Configure PITA-2 parallel interface */
-       writel(PITA2_MISC_CONFIG, candev->dev_base_addr + PITA2_MISC);
+       can_writel(PITA2_MISC_CONFIG, candev->aux_base_addr + PITA2_MISC);
 
        ems_cpcpci_disconnect_irq(candev);
 
        return 0;
 
     error_ioremap_io:
-       iounmap((void*)candev->dev_base_addr);
+       iounmap(candev->aux_base_addr);
     error_ioremap_pita2:
     #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
        pci_release_region(candev->sysdevptr.pcidev, 1);
@@ -156,8 +157,8 @@ int ems_cpcpci_release_io(struct candevice_t *candev)
 {
        ems_cpcpci_disconnect_irq(candev);
 
-       iounmap((void*)candev->io_addr);
-       iounmap((void*)candev->dev_base_addr);
+       iounmap(candev->dev_base_addr);
+       iounmap(candev->aux_base_addr);
     #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
        pci_release_region(candev->sysdevptr.pcidev, 1);
        pci_release_region(candev->sysdevptr.pcidev, 0);
@@ -169,18 +170,18 @@ int ems_cpcpci_release_io(struct candevice_t *candev)
 }
 
 
-void ems_cpcpci_write_register(unsigned data, unsigned long address)
+void ems_cpcpci_write_register(unsigned data, can_ioptr_t address)
 {
-       address += ((address&(EMS_CPCPCI_BYTES_PER_CIRCUIT-1))
-                           *(EMS_CPCPCI_BYTES_PER_REG-1));
-       writeb(data,address); 
+       address += ((can_ioptr2ulong(address)&(EMS_CPCPCI_BYTES_PER_CIRCUIT-1))
+                                            *(EMS_CPCPCI_BYTES_PER_REG-1));
+       can_writeb(data,address); 
 }
 
-unsigned ems_cpcpci_read_register(unsigned long address)
+unsigned ems_cpcpci_read_register(can_ioptr_t address)
 {
-       address += ((address&(EMS_CPCPCI_BYTES_PER_CIRCUIT-1))
-                           *(EMS_CPCPCI_BYTES_PER_REG-1));
-       return readb(address);
+       address += ((can_ioptr2ulong(address)&(EMS_CPCPCI_BYTES_PER_CIRCUIT-1))
+                                            *(EMS_CPCPCI_BYTES_PER_REG-1));
+       return can_readb(address);
 }
 
 int ems_cpcpci_irq_handler(int irq, struct canchip_t *chip)
@@ -191,12 +192,12 @@ int ems_cpcpci_irq_handler(int irq, struct canchip_t *chip)
        unsigned long icr;
        int test_irq_again;
 
-       icr=readl(candev->dev_base_addr + PITA2_ICR);
+       icr=can_readl(candev->aux_base_addr + PITA2_ICR);
        if(!(icr & PITA2_ICR_INT0)) return CANCHIP_IRQ_NONE;
        
        /* correct way to handle interrupts from all chips connected to the one PITA-2 */
        do {
-               writel(PITA2_ICR_INT0_En | PITA2_ICR_INT0, candev->dev_base_addr + PITA2_ICR);
+               can_writel(PITA2_ICR_INT0_En | PITA2_ICR_INT0, candev->aux_base_addr + PITA2_ICR);
                test_irq_again=0;
                for(i=0;i<candev->nr_all_chips;i++){
                        chip=candev->chip[i];
@@ -205,7 +206,7 @@ int ems_cpcpci_irq_handler(int irq, struct canchip_t *chip)
                        if(sja1000p_irq_handler(irq, chip))
                                test_irq_again=1;
                }
-               icr=readl(candev->dev_base_addr + PITA2_ICR);
+               icr=can_readl(candev->aux_base_addr + PITA2_ICR);
        } while((icr & PITA2_ICR_INT0)||test_irq_again);
        return CANCHIP_IRQ_HANDLED;
 }
@@ -282,9 +283,9 @@ int ems_cpcpci_init_hw_data(struct candevice_t *candev)
        if(ems_cpcpci_request_io(candev)<0)
                return -ENODEV;
 
-       /*** candev->dev_base_addr=pci_resource_start(pcidev,0); ***/
+       /*** candev->aux_base_addr=pci_resource_start(pcidev,0); ***/
        /* some control registers */
-       /*** candev->io_addr=pci_resource_start(pcidev,1); ***/
+       /*** candev->dev_base_addr=pci_resource_start(pcidev,1); ***/
        /* 0 more EMS control registers
          * 0x400 the first SJA1000
          * 0x600 the second SJA1000
@@ -295,9 +296,9 @@ int ems_cpcpci_init_hw_data(struct candevice_t *candev)
        
        for(l=0,i=0;i<4;i++){
                l<<=8;
-               l|=readb(candev->io_addr + i*4);
+               l|=can_readb(candev->dev_base_addr + i*4);
        }
-       i=readb(candev->io_addr + i*5);
+       i=can_readb(candev->dev_base_addr + i*5);
        
        CANMSG("EMS CPC-PCI check value %04lx, ID %d\n", l, i);
        
@@ -328,7 +329,7 @@ int ems_cpcpci_init_chip_data(struct candevice_t *candev, int chipnr)
 
        candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
 
-       candev->chip[chipnr]->chip_base_addr = candev->io_addr+
+       candev->chip[chipnr]->chip_base_addr = candev->dev_base_addr+
                        0x400 + chipnr*EMS_CPCPCI_BYTES_PER_CIRCUIT;
        candev->chip[chipnr]->flags = 0;
        candev->chip[chipnr]->int_cpu_reg = 0;