LinCAN sources go through big white-space cleanup.

[lincan.git] / lincan / include / sja1000p.h

diff --git a/lincan/include/sja1000p.h b/lincan/include/sja1000p.h
index 24e2357559c54520a097efb5775bb5e08dd219fc..ae331b93f08dc195225cf4231794f3521e3a81ab 100644 (file)
--- a/lincan/include/sja1000p.h
+++ b/lincan/include/sja1000p.h
@@ -81,7 +81,7 @@ enum SJA1000_PeliCAN_regs {
 /// Transmit Buffer (write) Receive Buffer (read) Frame Information
        SJAFRM = 0x10,
 /// ID bytes (11 bits in 0 and 1 or 16 bits in 0,1 and 13 bits in 2,3 (extended))
-       SJAID0 = 0x11, SJAID1 = 0x12, 
+       SJAID0 = 0x11, SJAID1 = 0x12,
 /// ID cont. for extended frames
        SJAID2 = 0x13, SJAID3 = 0x14,
 /// Data start standard frame
@@ -93,7 +93,7 @@ enum SJA1000_PeliCAN_regs {
 /// Acceptance Mask (4 bytes) in RESET mode
        SJAAMR0 = 0x14,
 /// 4 bytes
-       SJA_PeliCAN_AC_LEN = 4, 
+       SJA_PeliCAN_AC_LEN = 4,
 /// Clock Divider
        SJACDR = 0x1f
 };
@@ -108,7 +108,7 @@ enum sja1000_PeliCAN_MOD {
 };
 
 /** Command Register 0x01 */
-enum sja1000_PeliCAN_CMR { 
+enum sja1000_PeliCAN_CMR {
        sjaCMR_SRR= 1<<4,  // Self Reception Request (GoToSleep in BASIC mode)
        sjaCMR_CDO= 1<<3,  // Clear Data Overrun
        sjaCMR_RRB= 1<<2,  // Release Receive Buffer
@@ -138,7 +138,7 @@ enum sja1000_PeliCAN_IER {
        sjaIER_RIE = 1,    // Receive Interrupt Enable
        sjaENABLE_INTERRUPTS = sjaIER_BEIE|sjaIER_EPIE|sjaIER_DOIE|sjaIER_EIE|sjaIER_TIE|sjaIER_RIE,
        sjaDISABLE_INTERRUPTS = 0
-// WARNING: the chip automatically enters RESET (bus off) mode when 
+// WARNING: the chip automatically enters RESET (bus off) mode when
        // error counter > 255
 };