1 /**************************************************************************/
2 /* File: main.h - the CAN driver basic data structures and functions */
4 /* LinCAN - (Not only) Linux CAN bus driver */
5 /* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
6 /* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
7 /* Funded by OCERA and FRESCOR IST projects */
8 /* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
10 /* LinCAN is free software; you can redistribute it and/or modify it */
11 /* under terms of the GNU General Public License as published by the */
12 /* Free Software Foundation; either version 2, or (at your option) any */
13 /* later version. LinCAN is distributed in the hope that it will be */
14 /* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
15 /* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
16 /* General Public License for more details. You should have received a */
17 /* copy of the GNU General Public License along with LinCAN; see file */
18 /* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
19 /* Cambridge, MA 02139, USA. */
21 /* To allow use of LinCAN in the compact embedded systems firmware */
22 /* and RT-executives (RTEMS for example), main authors agree with next */
23 /* special exception: */
25 /* Including LinCAN header files in a file, instantiating LinCAN generics */
26 /* or templates, or linking other files with LinCAN objects to produce */
27 /* an application image/executable, does not by itself cause the */
28 /* resulting application image/executable to be covered by */
29 /* the GNU General Public License. */
30 /* This exception does not however invalidate any other reasons */
31 /* why the executable file might be covered by the GNU Public License. */
32 /* Publication of enhanced or derived LinCAN files is required although. */
33 /**************************************************************************/
36 #include "./constants.h"
37 #include "./can_sysdep.h"
38 #include "./can_queue.h"
41 #define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "lincan (debug): " fmt,\
44 #define DEBUGMSG(fmt,args...)
47 #define CANMSG(fmt,args...) can_printk(KERN_ERR "lincan: " fmt,##args)
50 extern can_spinlock_t canuser_manipulation_lock;
53 * struct canhardware_t - structure representing pointers to all CAN boards
54 * @nr_boards: number of present boards
55 * @rtr_queue: RTR - remote transmission request queue (expect some changes there)
56 * @rtr_lock: locking for RTR queue
57 * @candevice: array of pointers to CAN devices/boards
59 struct canhardware_t {
61 struct rtr_id *rtr_queue;
62 can_spinlock_t rtr_lock;
63 struct candevice_t *candevice[MAX_HW_CARDS];
67 * struct candevice_t - CAN device/board structure
68 * @hwname: text string with board type
69 * @candev_idx: board index in canhardware_t.candevice[]
70 * @io_addr: IO/physical MEM address
71 * @res_addr: optional reset register port
72 * @dev_base_addr: CPU translated IO/virtual MEM address
73 * @flags: board flags: %PROGRAMMABLE_IRQ .. interrupt number
74 * can be programmed into board
75 * @nr_all_chips: number of chips present on the board
76 * @nr_82527_chips: number of Intel 8257 chips
77 * @nr_sja1000_chips: number of Philips SJA100 chips
78 * @chip: array of pointers to the chip structures
79 * @hwspecops: pointer to board specific operations
80 * @hosthardware_p: pointer to the root hardware structure
81 * @sysdevptr: union reserved for pointer to bus specific
82 * device structure (case @pcidev is used for PCI devices)
84 * The structure represent configuration and state of associated board.
85 * The driver infrastructure prepares this structure and calls
86 * board type specific board_register() function. The board support provided
87 * register function fills right function pointers in @hwspecops structure.
88 * Then driver setup calls functions init_hw_data(), init_chip_data(),
89 * init_chip_data(), init_obj_data() and program_irq(). Function init_hw_data()
90 * and init_chip_data() have to specify number and types of connected chips
91 * or objects respectively.
92 * The use of @nr_all_chips is preferred over use of fields @nr_82527_chips
93 * and @nr_sja1000_chips in the board non-specific functions.
94 * The @io_addr and @dev_base_addr is filled from module parameters
95 * to the same value. The request_io function can fix-up @dev_base_addr
96 * field if virtual address is different than bus address.
99 char *hwname; /* text board type */
100 int candev_idx; /* board index in canhardware_t.candevice[] */
101 unsigned long io_addr; /* IO/physical MEM address */
102 unsigned long res_addr; /* optional reset register port */
103 can_ioptr_t dev_base_addr; /* CPU translated IO/virtual MEM address */
104 can_ioptr_t aux_base_addr; /* CPU translated IO/virtual MEM address */
108 int nr_sja1000_chips;
109 can_spinlock_t device_lock;
110 struct canchip_t *chip[MAX_HW_CHIPS];
112 struct hwspecops_t *hwspecops;
114 struct canhardware_t *hosthardware_p;
116 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10))
117 struct kref refcount;
122 #ifdef CAN_ENABLE_PCI_SUPPORT
123 struct pci_dev *pcidev;
124 #endif /*CAN_ENABLE_PCI_SUPPORT*/
130 * struct canchip_t - CAN chip state and type information
131 * @chip_type: text string describing chip type
132 * @chip_idx: index of the chip in candevice_t.chip[] array
133 * @chip_irq: chip interrupt number if any
134 * @chip_base_addr: chip base address in the CPU IO or virtual memory space
135 * @flags: chip flags: %CHIP_CONFIGURED .. chip is configured,
136 * %CHIP_SEGMENTED .. access to the chip is segmented (mainly for i82527 chips)
137 * @clock: chip base clock frequency in Hz
138 * @baudrate: selected chip baudrate in Hz
139 * @write_register: write chip register function copy
140 * @read_register: read chip register function copy
141 * @chip_data: pointer for optional chip specific data extension
142 * @sja_cdr_reg: SJA specific register -
143 * holds hardware specific options for the Clock Divider
144 * register. Options defined in the sja1000.h file:
145 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
146 * @sja_ocr_reg: SJA specific register -
147 * hold hardware specific options for the Output Control
148 * register. Options defined in the sja1000.h file:
149 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
150 * %OCR_TX0_LH, %OCR_TX1_ZZ.
151 * @int_cpu_reg: Intel specific register -
152 * holds hardware specific options for the CPU Interface
153 * register. Options defined in the i82527.h file:
154 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
155 * @int_clk_reg: Intel specific register -
156 * holds hardware specific options for the Clock Out
157 * register. Options defined in the i82527.h file:
158 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
159 * @int_bus_reg: Intel specific register -
160 * holds hardware specific options for the Bus Configuration
161 * register. Options defined in the i82527.h file:
162 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
163 * @msgobj: array of pointers to individual communication objects
164 * @chipspecops: pointer to the set of chip specific object filled by init_chip_data() function
165 * @hostdevice: pointer to chip hosting board
166 * @max_objects: maximal number of communication objects connected to this chip
167 * @chip_lock: reserved for synchronization of the chip supporting routines
168 * (not used in the current driver version)
169 * @worker_thread: chip worker thread ID (RT-Linux specific field)
170 * @pend_flags: holds information about pending interrupt and tx_wake() operations
171 * (RT-Linux specific field). Masks values:
172 * %MSGOBJ_TX_REQUEST .. some of the message objects requires tx_wake() call,
173 * %MSGOBJ_IRQ_REQUEST .. chip interrupt processing required
174 * %MSGOBJ_WORKER_WAKE .. marks, that worker thread should be waked
175 * for some of above reasons
177 * The fields @write_register and @read_register are copied from
178 * corresponding fields from @hwspecops structure
179 * (chip->hostdevice->hwspecops->write_register and
180 * chip->hostdevice->hwspecops->read_register)
181 * to speedup can_write_reg() and can_read_reg() functions.
185 int chip_idx; /* chip index in candevice_t.chip[] */
187 can_ioptr_t chip_base_addr;
189 long clock; /* Chip clock in Hz */
192 void (*write_register)(unsigned data, can_ioptr_t address);
193 unsigned (*read_register)(can_ioptr_t address);
197 unsigned short sja_cdr_reg; /* sja1000 only! */
198 unsigned short sja_ocr_reg; /* sja1000 only! */
199 unsigned short int_cpu_reg; /* intel 82527 only! */
200 unsigned short int_clk_reg; /* intel 82527 only! */
201 unsigned short int_bus_reg; /* intel 82527 only! */
203 struct msgobj_t *msgobj[MAX_MSGOBJS];
205 struct chipspecops_t *chipspecops;
207 struct candevice_t *hostdevice;
209 int max_objects; /* 1 for sja1000, 15 for i82527 */
211 can_spinlock_t chip_lock;
214 pthread_t worker_thread;
215 unsigned long pend_flags;
216 #endif /*CAN_WITH_RTL*/
220 * struct msgobj_t - structure holding communication object state
222 * @minor: associated device minor number
223 * @object: object number in canchip_t structure +1
224 * @flags: message object flags
225 * @ret: field holding status of the last Tx operation
226 * @qends: pointer to message object corresponding ends structure
227 * @tx_qedge: edge corresponding to transmitted message
228 * @tx_slot: slot holding transmitted message, slot is taken from
229 * canque_test_outslot() call and is freed by canque_free_outslot()
230 * or rescheduled canque_again_outslot()
231 * @tx_retry_cnt: transmission attempt counter
232 * @tx_timeout: can be used by chip driver to check for the transmission timeout
233 * @rx_msg: temporary storage to hold received messages before
234 * calling to canque_filter_msg2edges()
235 * @hostchip: pointer to the &canchip_t structure this object belongs to
236 * @obj_used: counter of users (associated file structures for Linux
237 * userspace clients) of this object
238 * @obj_users: list of user structures of type &canuser_t.
239 * @obj_flags: message object specific flags. Masks values:
240 * %MSGOBJ_TX_REQUEST .. the message object requests TX activation
241 * %MSGOBJ_TX_LOCK .. some IRQ routine or callback on some CPU
242 * is running inside TX activation processing code
243 * @rx_preconfig_id: place to store RX message identifier for some chip types
244 * that reuse same object for TX
247 can_ioptr_t obj_base_addr;
248 unsigned int minor; /* associated device minor number */
249 unsigned int object; /* object number in canchip_t +1 for debug printk */
250 unsigned long obj_flags;
253 struct canque_ends_t *qends;
255 struct canque_edge_t *tx_qedge;
256 struct canque_slot_t *tx_slot;
258 struct timer_list tx_timeout;
260 struct canmsg_t rx_msg;
262 struct canchip_t *hostchip;
264 unsigned long rx_preconfig_id;
267 struct list_head obj_users;
270 #define CAN_USER_MAGIC 0x05402033
273 * struct canuser_t - structure holding CAN user/client state
274 * @flags: used to distinguish Linux/RT-Linux type
275 * @peers: for connection into list of object users
276 * @qends: pointer to the ends structure corresponding for this user
277 * @msgobj: communication object the user is connected to
278 * @rx_edge0: default receive queue for filter IOCTL
279 * @userinfo: stores user context specific information.
280 * The field @fileinfo.file holds pointer to open device file state structure
281 * for the Linux user-space client applications
282 * @magic: magic number to check consistency when pointer is retrieved
283 * from file private field
287 struct list_head peers;
288 struct canque_ends_t *qends;
289 struct msgobj_t *msgobj;
290 struct canque_edge_t *rx_edge0; /* simplifies IOCTL */
293 struct file *file; /* back ptr to file */
297 struct rtl_file *file;
299 #endif /*CAN_WITH_RTL*/
305 * struct hwspecops_t - hardware/board specific operations
306 * @request_io: reserve io or memory range for can board
307 * @release_io: free reserved io memory range
308 * @reset: hardware reset routine
309 * @init_hw_data: called to initialize &candevice_t structure, mainly
310 * @res_add, @nr_all_chips, @nr_82527_chips, @nr_sja1000_chips
312 * @init_chip_data: called initialize each &canchip_t structure, mainly
313 * @chip_type, @chip_base_addr, @clock and chip specific registers.
314 * It is responsible to setup &canchip_t->@chipspecops functions
315 * for non-standard chip types (type other than "i82527", "sja1000" or "sja1000p")
316 * @init_obj_data: called initialize each &msgobj_t structure,
317 * mainly @obj_base_addr field.
318 * @program_irq: program interrupt generation hardware of the board
319 * if flag %PROGRAMMABLE_IRQ is present for specified device/board
320 * @write_register: low level write register routine
321 * @read_register: low level read register routine
324 int (*request_io)(struct candevice_t *candev);
325 int (*release_io)(struct candevice_t *candev);
326 int (*reset)(struct candevice_t *candev);
327 int (*init_hw_data)(struct candevice_t *candev);
328 int (*init_chip_data)(struct candevice_t *candev, int chipnr);
329 int (*init_obj_data)(struct canchip_t *chip, int objnr);
330 int (*program_irq)(struct candevice_t *candev);
331 void (*write_register)(unsigned data, can_ioptr_t address);
332 unsigned (*read_register)(can_ioptr_t address);
334 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10))
335 void (*release_device)(struct kref *refcount);
341 * struct chipspecops_t - can controller chip specific operations
342 * @chip_config: CAN chip configuration
343 * @baud_rate: set communication parameters
344 * @standard_mask: setup of mask for message filtering
345 * @extended_mask: setup of extended mask for message filtering
346 * @message15_mask: set mask of i82527 message object 15
347 * @clear_objects: clears state of all message object residing in chip
348 * @config_irqs: tunes chip hardware interrupt delivery
349 * @pre_read_config: prepares message object for message reception
350 * @pre_write_config: prepares message object for message transmission
351 * @send_msg: initiate message transmission
352 * @remote_request: configures message object and asks for RTR message
353 * @check_tx_stat: checks state of transmission engine
354 * @wakeup_tx: wakeup TX processing
355 * @filtch_rq: optional routine for propagation of outgoing edges filters to HW
356 * @enable_configuration: enable chip configuration mode
357 * @disable_configuration: disable chip configuration mode
358 * @set_btregs: configures bitrate registers
359 * @attach_to_chip: attaches to the chip, setups registers and possibly state informations
360 * @release_chip: called before chip structure removal if %CHIP_ATTACHED is set
361 * @start_chip: starts chip message processing
362 * @stop_chip: stops chip message processing
363 * @irq_handler: interrupt service routine
364 * @irq_accept: optional fast irq accept routine responsible for blocking further interrupts
366 struct chipspecops_t {
367 int (*chip_config)(struct canchip_t *chip);
368 int (*baud_rate)(struct canchip_t *chip, int rate, int clock, int sjw,
369 int sampl_pt, int flags);
370 int (*standard_mask)(struct canchip_t *chip, unsigned short code,
371 unsigned short mask);
372 int (*extended_mask)(struct canchip_t *chip, unsigned long code,
374 int (*message15_mask)(struct canchip_t *chip, unsigned long code,
376 int (*clear_objects)(struct canchip_t *chip);
377 int (*config_irqs)(struct canchip_t *chip, short irqs);
378 int (*pre_read_config)(struct canchip_t *chip, struct msgobj_t *obj);
379 int (*pre_write_config)(struct canchip_t *chip, struct msgobj_t *obj,
380 struct canmsg_t *msg);
381 int (*send_msg)(struct canchip_t *chip, struct msgobj_t *obj,
382 struct canmsg_t *msg);
383 int (*remote_request)(struct canchip_t *chip, struct msgobj_t *obj);
384 int (*check_tx_stat)(struct canchip_t *chip);
385 int (*wakeup_tx)(struct canchip_t *chip, struct msgobj_t *obj);
386 int (*filtch_rq)(struct canchip_t *chip, struct msgobj_t *obj);
387 int (*enable_configuration)(struct canchip_t *chip);
388 int (*disable_configuration)(struct canchip_t *chip);
389 int (*set_btregs)(struct canchip_t *chip, unsigned short btr0,
390 unsigned short btr1);
391 int (*attach_to_chip)(struct canchip_t *chip);
392 int (*release_chip)(struct canchip_t *chip);
393 int (*start_chip)(struct canchip_t *chip);
394 int (*stop_chip)(struct canchip_t *chip);
395 int (*irq_handler)(int irq, struct canchip_t *chip);
396 int (*irq_accept)(int irq, struct canchip_t *chip);
401 struct mem_addr *next;
405 /* Structure for the RTR queue */
408 struct canmsg_t *rtr_message;
409 wait_queue_head_t rtr_wq;
414 extern int minor[MAX_TOT_CHIPS];
416 extern int baudrate[MAX_TOT_CHIPS];
417 extern int irq[MAX_IRQ];
418 extern char *hw[MAX_HW_CARDS];
419 extern unsigned long io[MAX_HW_CARDS];
420 extern long clockfreq[MAX_HW_CARDS];
421 extern int processlocal;
423 extern struct canhardware_t *hardware_p;
424 extern struct canchip_t *chips_p[MAX_TOT_CHIPS];
425 extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
427 extern struct mem_addr *mem_head;
430 #if defined(CONFIG_OC_LINCAN_PORTIO_ONLY)
431 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs)
433 can_outb(data, chip->chip_base_addr+reg_offs);
435 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
437 return can_inb(chip->chip_base_addr+reg_offs);
439 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
440 unsigned char data, unsigned reg_offs)
442 can_outb(data, obj->obj_base_addr+reg_offs);
444 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
447 return can_inb(obj->obj_base_addr+reg_offs);
450 #elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY)
451 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs)
453 can_writeb(data, chip->chip_base_addr+reg_offs);
455 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
457 return can_readb(chip->chip_base_addr+reg_offs);
459 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
460 unsigned char data, unsigned reg_offs)
462 can_writeb(data, obj->obj_base_addr+reg_offs);
464 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
467 return can_readb(obj->obj_base_addr+reg_offs);
470 #else /*CONFIG_OC_LINCAN_DYNAMICIO*/
471 #ifndef CONFIG_OC_LINCAN_DYNAMICIO
472 #define CONFIG_OC_LINCAN_DYNAMICIO
475 /* Inline function to write to the hardware registers. The argument reg_offs is
476 * relative to the memory map of the chip and not the absolute memory reg_offs.
478 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs)
480 can_ioptr_t address_to_write;
481 address_to_write = chip->chip_base_addr+reg_offs;
482 chip->write_register(data, address_to_write);
485 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
487 can_ioptr_t address_to_read;
488 address_to_read = chip->chip_base_addr+reg_offs;
489 return chip->read_register(address_to_read);
492 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
493 unsigned char data, unsigned reg_offs)
495 can_ioptr_t address_to_write;
496 address_to_write = obj->obj_base_addr+reg_offs;
497 chip->write_register(data, address_to_write);
500 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
503 can_ioptr_t address_to_read;
504 address_to_read = obj->obj_base_addr+reg_offs;
505 return chip->read_register(address_to_read);
508 #endif /*CONFIG_OC_LINCAN_DYNAMICIO*/
510 int can_base_addr_fixup(struct candevice_t *candev, can_ioptr_t new_base);
511 int can_request_io_region(unsigned long start, unsigned long n, const char *name);
512 void can_release_io_region(unsigned long start, unsigned long n);
513 int can_request_mem_region(unsigned long start, unsigned long n, const char *name);
514 void can_release_mem_region(unsigned long start, unsigned long n);
517 const char *boardtype;
518 int (*board_register)(struct hwspecops_t *hwspecops);
522 const struct boardtype_t* boardtype_find(const char *str);
524 int can_check_dev_taken(void *anydev);
526 #if defined(can_gettimeofday) && defined(CAN_MSG_VERSION_2) && 1
528 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
530 can_gettimeofday(ptimestamp);
532 #else /* No timestamp support, set field to zero */
534 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
536 #ifdef CAN_MSG_VERSION_2
537 ptimestamp->tv_sec = 0;
538 ptimestamp->tv_usec = 0;
539 #else /* CAN_MSG_VERSION_2 */
541 #endif /* CAN_MSG_VERSION_2 */
544 #endif /* End of timestamp source selection */
547 extern int can_rtl_priority;
548 #endif /*CAN_WITH_RTL*/
550 extern struct candevice_t* register_hotplug_dev(const char *hwname,int (*chipdataregfnc)(struct canchip_t *chip,void *data),void *devdata);
551 extern void deregister_hotplug_dev(struct candevice_t *dev);
552 extern void cleanup_hotplug_dev(struct candevice_t *dev);