embedded/arch/arm/mach-lpc21xx/defines/lpcADC-214x.h

   1 #ifndef INC_LPC_ADC_214x_H
   2 #define INC_LPC_ADC_214x_H
   3
   4 // A/D Converter Registers
   5 typedef struct
   6 {
   7   REG32 cr;                     // Control Register
   8   REG32 gdr;                    // Global Data Register
   9   REG32 gsr;                    // Global Start Register
  10   REG32 inten;                  // Interrupt Enable Register
  11   REG32 dr0;                    // Channel 0 Data Register
  12   REG32 dr1;                    // Channel 1 Data Register
  13   REG32 dr2;                    // Channel 2 Data Register
  14   REG32 dr3;                    // Channel 3 Data Register
  15   REG32 dr4;                    // Channel 4 Data Register
  16   REG32 dr5;                    // Channel 5 Data Register
  17   REG32 dr6;                    // Channel 6 Data Register
  18   REG32 dr7;                    // Channel 7 Data Register
  19   REG32 stat;                   // Status Register
  20 } adc214xRegs_t;
  21
  22 #define ADCR_SEL                0x000000FF
  23 #define ADCR_CLKDIV             0x0000FF00
  24 #define ADCR_BURST              0x00010000
  25 #define ADCR_CLKS               0x000E0000
  26 #define ADCR_PDN                0x00200000
  27 #define ADCR_START              0x07000000
  28 #define ADCR_EDGE               0x08000000
  29
  30 #define ADGDR_RESULT            0x0000FFC0
  31 #define ADGDR_CHN               0x07000000
  32 #define ADGDR_OVERRUN           0x40000000
  33 #define ADGDR_DONE              0x80000000
  34
  35 #define ADGSR_BURST             0x00010000
  36 #define ADGSR_START             0x07000000
  37 #define ADGSR_EDGE              0x08000000
  38
  39 #define ADSTAT_DONE             0x000000FF
  40 #define ADSTAT_DONE0            0x00000001
  41 #define ADSTAT_DONE1            0x00000002
  42 #define ADSTAT_DONE2            0x00000004
  43 #define ADSTAT_DONE3            0x00000008
  44 #define ADSTAT_DONE4            0x00000010
  45 #define ADSTAT_DONE5            0x00000020
  46 #define ADSTAT_DONE6            0x00000040
  47 #define ADSTAT_DONE7            0x00000080
  48 #define ADSTAT_OVERRUN          0x0000FF00
  49 #define ADSTAT_OVERRUN0         0x00000100
  50 #define ADSTAT_OVERRUN1         0x00000200
  51 #define ADSTAT_OVERRUN2         0x00000400
  52 #define ADSTAT_OVERRUN3         0x00000800
  53 #define ADSTAT_OVERRUN4         0x00001000
  54 #define ADSTAT_OVERRUN5         0x00002000
  55 #define ADSTAT_OVERRUN6         0x00004000
  56 #define ADSTAT_OVERRUN7         0x00008000
  57 #define ADSTAT_ADINT            0x00010000
  58
  59 #define ADINTEN_INTEN           0x000000FF
  60 #define ADINTEN_INTEN0          0x00000001
  61 #define ADINTEN_INTEN1          0x00000002
  62 #define ADINTEN_INTEN2          0x00000004
  63 #define ADINTEN_INTEN3          0x00000008
  64 #define ADINTEN_INTEN4          0x00000010
  65 #define ADINTEN_INTEN5          0x00000020
  66 #define ADINTEN_INTEN6          0x00000040
  67 #define ADINTEN_INTEN7          0x00000080
  68 #define ADINTEN_GINTEN          0x00000100
  69
  70 #define ADDR_RESULT             0x0000FFC0
  71 #define ADDR_OVERRUN            0x40000000
  72 #define ADDR_DONE               0x80000000
  73
  74 #endif