Added glue required for RTL hardware filters updates.
[lincan.git] / lincan / src / sja1000p.c
1 /* sja1000.c
2  * Linux CAN-bus device driver.
3  * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4  * Changed for PeliCan mode SJA1000 by Tomasz Motylewski (BFAD GmbH)
5  * T.Motylewski@bfad.de
6  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
7  * email:pisa@cmp.felk.cvut.cz
8  * This software is released under the GPL-License.
9  * Version lincan-0.2  9 Jul 2003
10  */
11
12 #include "../include/can.h"
13 #include "../include/can_sysdep.h"
14 #include "../include/main.h"
15 #include "../include/sja1000p.h"
16
17 /**
18  * sja1000p_enable_configuration - enable chip configuration mode
19  * @chip: pointer to chip state structure
20  */
21 int sja1000p_enable_configuration(struct chip_t *chip)
22 {
23         int i=0;
24         enum sja1000_PeliCAN_MOD flags;
25
26         can_disable_irq(chip->chip_irq);
27
28         flags=can_read_reg(chip,SJAMOD);
29
30         while ((!(flags & MOD_RM)) && (i<=10)) {
31                 can_write_reg(chip, MOD_RM, SJAMOD);
32 // TODO: configurable MOD_AFM (32/16 bit acceptance filter)
33 // config MOD_LOM (listen only)
34                 udelay(100);
35                 i++;
36                 flags=can_read_reg(chip, SJAMOD);
37         }
38         if (i>=10) {
39                 CANMSG("Reset error\n");
40                 can_enable_irq(chip->chip_irq);
41                 return -ENODEV;
42         }
43
44         return 0;
45 }
46
47 /**
48  * sja1000p_disable_configuration - disable chip configuration mode
49  * @chip: pointer to chip state structure
50  */
51 int sja1000p_disable_configuration(struct chip_t *chip)
52 {
53         int i=0;
54         enum sja1000_PeliCAN_MOD flags;
55
56         flags=can_read_reg(chip,SJAMOD);
57
58         while ( (flags & MOD_RM) && (i<=50) ) {
59 // could be as long as 11*128 bit times after buss-off
60                 can_write_reg(chip, 0, SJAMOD);
61 // TODO: configurable MOD_AFM (32/16 bit acceptance filter)
62 // config MOD_LOM (listen only)
63                 udelay(100);
64                 i++;
65                 flags=can_read_reg(chip, SJAMOD);
66         }
67         if (i>=10) {
68                 CANMSG("Error leaving reset status\n");
69                 return -ENODEV;
70         }
71
72         can_enable_irq(chip->chip_irq);
73
74         return 0;
75 }
76
77 /**
78  * sja1000p_chip_config: - can chip configuration
79  * @chip: pointer to chip state structure
80  *
81  * This function configures chip and prepares it for message
82  * transmission and reception. The function resets chip,
83  * resets mask for acceptance of all messages by call to
84  * sja1000p_extended_mask() function and then 
85  * computes and sets baudrate with use of function sja1000p_baud_rate().
86  * Return Value: negative value reports error.
87  * File: src/sja1000p.c
88  */
89 int sja1000p_chip_config(struct chip_t *chip)
90 {
91         int i;
92         unsigned char n, r;
93         
94         if (sja1000p_enable_configuration(chip))
95                 return -ENODEV;
96
97         /* Set mode, clock out, comparator */
98         can_write_reg(chip,CDR_PELICAN|chip->sja_cdr_reg,SJACDR); 
99         /* Set driver output configuration */
100         can_write_reg(chip,chip->sja_ocr_reg,SJAOCR); 
101         
102         /* Simple check for chip presence */
103         for (i=0, n=0x5a; i<8; i++, n+=0xf) {
104                 can_write_reg(chip,n,SJAACR0+i);
105         }
106         for (i=0, n=0x5a; i<8; i++, n+=0xf) {
107                 r = n^can_read_reg(chip,SJAACR0+i);
108                 if (r) {
109                         CANMSG("sja1000p_chip_config: chip connection broken,"
110                                 " readback differ 0x%02x\n", r);
111                         return -ENODEV;
112                 }
113         }
114         
115
116         if (sja1000p_extended_mask(chip,0x00000000, 0xffffffff))
117                 return -ENODEV;
118         
119         if (!chip->baudrate)
120                 chip->baudrate=1000000;
121         if (sja1000p_baud_rate(chip,chip->baudrate,chip->clock,0,75,0))
122                 return -ENODEV;
123
124         /* Enable hardware interrupts */
125         can_write_reg(chip, ENABLE_INTERRUPTS, SJAIER); 
126
127         sja1000p_disable_configuration(chip);
128         
129         return 0;
130 }
131
132 /**
133  * sja1000p_extended_mask: - setup of extended mask for message filtering
134  * @chip: pointer to chip state structure
135  * @code: can message acceptance code
136  * @mask: can message acceptance mask
137  *
138  * Return Value: negative value reports error.
139  * File: src/sja1000p.c
140  */
141 int sja1000p_extended_mask(struct chip_t *chip, unsigned long code, unsigned  long mask)
142 {
143         int i;
144
145         if (sja1000p_enable_configuration(chip))
146                 return -ENODEV;
147
148 // LSB to +3, MSB to +0 
149         for(i=SJA_PeliCAN_AC_LEN; --i>=0;) {
150                 can_write_reg(chip,code&0xff,SJAACR0+i);
151                 can_write_reg(chip,mask&0xff,SJAAMR0+i);
152                 code >>= 8;
153                 mask >>= 8;
154         }
155
156         DEBUGMSG("Setting acceptance code to 0x%lx\n",(unsigned long)code);
157         DEBUGMSG("Setting acceptance mask to 0x%lx\n",(unsigned long)mask);
158
159         sja1000p_disable_configuration(chip);
160
161         return 0;
162 }
163
164 /**
165  * sja1000p_baud_rate: - set communication parameters.
166  * @chip: pointer to chip state structure
167  * @rate: baud rate in Hz
168  * @clock: frequency of sja1000 clock in Hz (ISA osc is 14318000)
169  * @sjw: synchronization jump width (0-3) prescaled clock cycles
170  * @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio
171  * @flags: fields %BTR1_SAM, %OCMODE, %OCPOL, %OCTP, %OCTN, %CLK_OFF, %CBP
172  *
173  * Return Value: negative value reports error.
174  * File: src/sja1000p.c
175  */
176 int sja1000p_baud_rate(struct chip_t *chip, int rate, int clock, int sjw,
177                                                         int sampl_pt, int flags)
178 {
179         int best_error = 1000000000, error;
180         int best_tseg=0, best_brp=0, best_rate=0, brp=0;
181         int tseg=0, tseg1=0, tseg2=0;
182         
183         if (sja1000p_enable_configuration(chip))
184                 return -ENODEV;
185
186         clock /=2;
187
188         /* tseg even = round down, odd = round up */
189         for (tseg=(0+0+2)*2; tseg<=(MAX_TSEG2+MAX_TSEG1+2)*2+1; tseg++) {
190                 brp = clock/((1+tseg/2)*rate)+tseg%2;
191                 if (brp == 0 || brp > 64)
192                         continue;
193                 error = rate - clock/(brp*(1+tseg/2));
194                 if (error < 0)
195                         error = -error;
196                 if (error <= best_error) {
197                         best_error = error;
198                         best_tseg = tseg/2;
199                         best_brp = brp-1;
200                         best_rate = clock/(brp*(1+tseg/2));
201                 }
202         }
203         if (best_error && (rate/best_error < 10)) {
204                 CANMSG("baud rate %d is not possible with %d Hz clock\n",
205                                                                 rate, 2*clock);
206                 CANMSG("%d bps. brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d\n",
207                                 best_rate, best_brp, best_tseg, tseg1, tseg2);
208                 return -EINVAL;
209         }
210         tseg2 = best_tseg-(sampl_pt*(best_tseg+1))/100;
211         if (tseg2 < 0)
212                 tseg2 = 0;
213         if (tseg2 > MAX_TSEG2)
214                 tseg2 = MAX_TSEG2;
215         tseg1 = best_tseg-tseg2-2;
216         if (tseg1>MAX_TSEG1) {
217                 tseg1 = MAX_TSEG1;
218                 tseg2 = best_tseg-tseg1-2;
219         }
220
221         DEBUGMSG("Setting %d bps.\n", best_rate);
222         DEBUGMSG("brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d, sampl_pt=%d\n",
223                                         best_brp, best_tseg, tseg1, tseg2,
224                                         (100*(best_tseg-tseg2)/(best_tseg+1)));
225
226
227         can_write_reg(chip, sjw<<6 | best_brp, SJABTR0);
228         can_write_reg(chip, ((flags & BTR1_SAM) != 0)<<7 | (tseg2<<4) 
229                                         | tseg1, SJABTR1);
230
231         sja1000p_disable_configuration(chip);
232
233         return 0;
234 }
235
236 /**
237  * sja1000p_read: - reads and distributes one or more received messages
238  * @chip: pointer to chip state structure
239  * @obj: pinter to CAN message queue information
240  *
241  * File: src/sja1000p.c
242  */
243 void sja1000p_read(struct chip_t *chip, struct msgobj_t *obj) {
244         int i, flags, len, datastart;
245         do {
246                 flags = can_read_reg(chip,SJAFRM);
247                 if(flags&FRM_FF) {
248                         obj->rx_msg.id =
249                                 (can_read_reg(chip,SJAID0)<<21) +
250                                 (can_read_reg(chip,SJAID1)<<13) +
251                                 (can_read_reg(chip,SJAID2)<<5) +
252                                 (can_read_reg(chip,SJAID3)>>3);
253                         datastart = SJADATE;
254                 } else {
255                         obj->rx_msg.id =
256                                 (can_read_reg(chip,SJAID0)<<3) +
257                                 (can_read_reg(chip,SJAID1)>>5);
258                         datastart = SJADATS;
259                 }
260                 obj->rx_msg.flags =
261                         ((flags & FRM_RTR) ? MSG_RTR : 0) |
262                         ((flags & FRM_FF) ? MSG_EXT : 0);
263                 len = flags & FRM_DLC_M;
264                 obj->rx_msg.length = len;
265                 if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
266                 for(i=0; i< len; i++) {
267                         obj->rx_msg.data[i]=can_read_reg(chip,datastart+i);
268                 }
269
270                 canque_filter_msg2edges(obj->qends, &obj->rx_msg);
271
272                 can_write_reg(chip, CMR_RRB, SJACMR);
273
274         } while (can_read_reg(chip, SJASR) & SR_RBS);
275 }
276
277 /**
278  * sja1000p_pre_read_config: - prepares message object for message reception
279  * @chip: pointer to chip state structure
280  * @obj: pointer to message object state structure
281  *
282  * Return Value: negative value reports error.
283  *      Positive value indicates immediate reception of message.
284  * File: src/sja1000p.c
285  */
286 int sja1000p_pre_read_config(struct chip_t *chip, struct msgobj_t *obj)
287 {
288         int status;
289         status=can_read_reg(chip,SJASR);
290         
291         if(status  & SR_BS) {
292                 /* Try to recover from error condition */
293                 DEBUGMSG("sja1000p_pre_read_config bus-off recover 0x%x\n",status);
294                 sja1000p_enable_configuration(chip);
295                 can_write_reg(chip, 0, SJARXERR);
296                 can_write_reg(chip, 0, SJATXERR1);
297                 can_read_reg(chip, SJAECC);
298                 sja1000p_disable_configuration(chip);
299         }
300
301         if (!(status&SR_RBS)) {
302                 return 0;
303         }
304
305         can_write_reg(chip, DISABLE_INTERRUPTS, SJAIER); //disable interrupts for a moment
306         sja1000p_read(chip, obj);
307         can_write_reg(chip, ENABLE_INTERRUPTS, SJAIER); //enable interrupts
308         return 1;
309 }
310
311 #define MAX_TRANSMIT_WAIT_LOOPS 10
312 /**
313  * sja1000p_pre_write_config: - prepares message object for message transmission
314  * @chip: pointer to chip state structure
315  * @obj: pointer to message object state structure
316  * @msg: pointer to CAN message
317  *
318  * This function prepares selected message object for future initiation
319  * of message transmission by sja1000p_send_msg() function.
320  * The CAN message data and message ID are transfered from @msg slot
321  * into chip buffer in this function.
322  * Return Value: negative value reports error.
323  * File: src/sja1000p.c
324  */
325 int sja1000p_pre_write_config(struct chip_t *chip, struct msgobj_t *obj, 
326                                                         struct canmsg_t *msg)
327 {
328         int i=0; 
329         unsigned int id;
330         int status;
331         int len;
332
333         /* Wait until Transmit Buffer Status is released */
334         while ( !((status=can_read_reg(chip, SJASR)) & SR_TBS) && 
335                                                 i++<MAX_TRANSMIT_WAIT_LOOPS) {
336                 udelay(i);
337         }
338         
339         if(status & SR_BS) {
340                 /* Try to recover from error condition */
341                 DEBUGMSG("sja1000p_pre_write_config bus-off recover 0x%x\n",status);
342                 sja1000p_enable_configuration(chip);
343                 can_write_reg(chip, 0, SJARXERR);
344                 can_write_reg(chip, 0, SJATXERR1);
345                 can_read_reg(chip, SJAECC);
346                 sja1000p_disable_configuration(chip);
347         }
348         if (!(can_read_reg(chip, SJASR) & SR_TBS)) {
349                 CANMSG("Transmit timed out, cancelling\n");
350 // here we should check if there is no write/select waiting for this
351 // transmit. If so, set error ret and wake up.
352 // CHECKME: if we do not disable IER_TIE (TX IRQ) here we get interrupt
353 // immediately
354                 can_write_reg(chip, CMR_AT, SJACMR);
355                 i=0;
356                 while ( !(can_read_reg(chip, SJASR) & SR_TBS) &&
357                                                 i++<MAX_TRANSMIT_WAIT_LOOPS) {
358                         udelay(i);
359                 }
360                 if (!(can_read_reg(chip, SJASR) & SR_TBS)) {
361                         CANMSG("Could not cancel, please reset\n");
362                         return -EIO;
363                 }
364         }
365         len = msg->length;
366         if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
367         /* len &= FRM_DLC_M; ensured by above condition already */
368         can_write_reg(chip, ((msg->flags&MSG_EXT)?FRM_FF:0) |
369                 ((msg->flags & MSG_RTR) ? FRM_RTR : 0) | len, SJAFRM);
370         if(msg->flags&MSG_EXT) {
371                 id=msg->id<<3;
372                 can_write_reg(chip, id & 0xff, SJAID3);
373                 id >>= 8;
374                 can_write_reg(chip, id & 0xff, SJAID2);
375                 id >>= 8;
376                 can_write_reg(chip, id & 0xff, SJAID1);
377                 id >>= 8;
378                 can_write_reg(chip, id, SJAID0);
379                 for(i=0; i < len; i++) {
380                         can_write_reg(chip, msg->data[i], SJADATE+i);
381                 }
382         } else {
383                 id=msg->id<<5;
384                 can_write_reg(chip, (id >> 8) & 0xff, SJAID0);
385                 can_write_reg(chip, id & 0xff, SJAID1);
386                 for(i=0; i < len; i++) {
387                         can_write_reg(chip, msg->data[i], SJADATS+i);
388                 }
389         }
390         return 0;
391 }
392
393 /**
394  * sja1000p_send_msg: - initiate message transmission
395  * @chip: pointer to chip state structure
396  * @obj: pointer to message object state structure
397  * @msg: pointer to CAN message
398  *
399  * This function is called after sja1000p_pre_write_config() function,
400  * which prepares data in chip buffer.
401  * Return Value: negative value reports error.
402  * File: src/sja1000p.c
403  */
404 int sja1000p_send_msg(struct chip_t *chip, struct msgobj_t *obj, 
405                                                         struct canmsg_t *msg)
406 {
407         can_write_reg(chip, CMR_TR, SJACMR);
408
409         return 0;
410 }
411
412 /**
413  * sja1000p_check_tx_stat: - checks state of transmission engine
414  * @chip: pointer to chip state structure
415  *
416  * Return Value: negative value reports error.
417  *      Positive return value indicates transmission under way status.
418  *      Zero value indicates finishing of all issued transmission requests.
419  * File: src/sja1000p.c
420  */
421 int sja1000p_check_tx_stat(struct chip_t *chip)
422 {
423         if (can_read_reg(chip,SJASR) & SR_TCS)
424                 return 0;
425         else
426                 return 1;
427 }
428
429 /**
430  * sja1000p_set_btregs: -  configures bitrate registers
431  * @chip: pointer to chip state structure
432  * @btr0: bitrate register 0
433  * @btr1: bitrate register 1
434  *
435  * Return Value: negative value reports error.
436  * File: src/sja1000p.c
437  */
438 int sja1000p_set_btregs(struct chip_t *chip, unsigned short btr0, 
439                                                         unsigned short btr1)
440 {
441         if (sja1000p_enable_configuration(chip))
442                 return -ENODEV;
443
444         can_write_reg(chip, btr0, SJABTR0);
445         can_write_reg(chip, btr1, SJABTR1);
446
447         sja1000p_disable_configuration(chip);
448
449         return 0;
450 }
451
452 /**
453  * sja1000p_start_chip: -  starts chip message processing
454  * @chip: pointer to chip state structure
455  *
456  * Return Value: negative value reports error.
457  * File: src/sja1000p.c
458  */
459 int sja1000p_start_chip(struct chip_t *chip)
460 {
461         enum sja1000_PeliCAN_MOD flags;
462
463         flags = can_read_reg(chip, SJAMOD) & (MOD_LOM|MOD_STM|MOD_AFM|MOD_SM);
464         can_write_reg(chip, flags, SJAMOD);
465
466         return 0;
467 }
468
469 /**
470  * sja1000p_stop_chip: -  stops chip message processing
471  * @chip: pointer to chip state structure
472  *
473  * Return Value: negative value reports error.
474  * File: src/sja1000p.c
475  */
476 int sja1000p_stop_chip(struct chip_t *chip)
477 {
478         enum sja1000_PeliCAN_MOD flags;
479
480         flags = can_read_reg(chip, SJAMOD) & (MOD_LOM|MOD_STM|MOD_AFM|MOD_SM);
481         can_write_reg(chip, flags|MOD_RM, SJAMOD);
482
483         return 0;
484 }
485
486
487 /**
488  * sja1000p_remote_request: - configures message object and asks for RTR message
489  * @chip: pointer to chip state structure
490  * @obj: pointer to message object structure
491  *
492  * Return Value: negative value reports error.
493  * File: src/sja1000p.c
494  */
495 int sja1000p_remote_request(struct chip_t *chip, struct msgobj_t *obj)
496 {
497         CANMSG("sja1000p_remote_request not implemented\n");
498         return -ENOSYS;
499 }
500
501 /**
502  * sja1000p_standard_mask: - setup of mask for message filtering
503  * @chip: pointer to chip state structure
504  * @code: can message acceptance code
505  * @mask: can message acceptance mask
506  *
507  * Return Value: negative value reports error.
508  * File: src/sja1000p.c
509  */
510 int sja1000p_standard_mask(struct chip_t *chip, unsigned short code,
511                 unsigned short mask)
512 {
513         CANMSG("sja1000p_standard_mask not implemented\n");
514         return -ENOSYS;
515 }
516
517 /**
518  * sja1000p_clear_objects: - clears state of all message object residing in chip
519  * @chip: pointer to chip state structure
520  *
521  * Return Value: negative value reports error.
522  * File: src/sja1000p.c
523  */
524 int sja1000p_clear_objects(struct chip_t *chip)
525 {
526         CANMSG("sja1000p_clear_objects not implemented\n");
527         return -ENOSYS;
528 }
529
530 /**
531  * sja1000p_config_irqs: - tunes chip hardware interrupt delivery
532  * @chip: pointer to chip state structure
533  * @irqs: requested chip IRQ configuration
534  *
535  * Return Value: negative value reports error.
536  * File: src/sja1000p.c
537  */
538 int sja1000p_config_irqs(struct chip_t *chip, short irqs)
539 {
540         CANMSG("sja1000p_config_irqs not implemented\n");
541         return -ENOSYS;
542 }
543
544 /**
545  * sja1000p_irq_write_handler: - part of ISR code responsible for transmit events
546  * @chip: pointer to chip state structure
547  * @obj: pointer to attached queue description
548  *
549  * The main purpose of this function is to read message from attached queues
550  * and transfer message contents into CAN controller chip.
551  * This subroutine is called by
552  * sja1000p_irq_write_handler() for transmit events.
553  * File: src/sja1000p.c
554  */
555 void sja1000p_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj)
556 {
557         int cmd;
558         
559         if(obj->tx_slot){
560                 /* Do local transmitted message distribution if enabled */
561                 if (processlocal){
562                         obj->tx_slot->msg.flags |= MSG_LOCAL;
563                         canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
564                 }
565                 /* Free transmitted slot */
566                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
567                 obj->tx_slot=NULL;
568         }
569         
570         cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
571         if(cmd<0)
572                 return;
573
574         if (chip->chipspecops->pre_write_config(chip, obj, &obj->tx_slot->msg)) {
575                 obj->ret = -1;
576                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_PREP);
577                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
578                 obj->tx_slot=NULL;
579                 return;
580         }
581         if (chip->chipspecops->send_msg(chip, obj, &obj->tx_slot->msg)) {
582                 obj->ret = -1;
583                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_SEND);
584                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
585                 obj->tx_slot=NULL;
586                 return;
587         }
588
589 }
590
591 #define MAX_RETR 10
592
593 /**
594  * sja1000p_irq_handler: - interrupt service routine
595  * @irq: interrupt vector number, this value is system specific
596  * @dev_id: driver private pointer registered at time of request_irq() call.
597  *      The CAN driver uses this pointer to store relationship of interrupt
598  *      to chip state structure - @struct chip_t
599  * @regs: system dependent value pointing to registers stored in exception frame
600  * 
601  * Interrupt handler is activated when state of CAN controller chip changes,
602  * there is message to be read or there is more space for new messages or
603  * error occurs. The receive events results in reading of the message from
604  * CAN controller chip and distribution of message through attached
605  * message queues.
606  * File: src/sja1000p.c
607  */
608 can_irqreturn_t sja1000p_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
609 {
610         int irq_register, status, error_code;
611         struct chip_t *chip=(struct chip_t *)dev_id;
612         struct msgobj_t *obj=chip->msgobj[0];
613
614         irq_register=can_read_reg(chip,SJAIR);
615 //      DEBUGMSG("sja1000_irq_handler: SJAIR:%02x\n",irq_register);
616 //      DEBUGMSG("sja1000_irq_handler: SJASR:%02x\n",
617 //                                      can_read_reg(chip,SJASR));
618
619         if ((irq_register & (IR_BEI|IR_EPI|IR_DOI|IR_EI|IR_TI|IR_RI)) == 0)
620                 return CAN_IRQ_NONE;
621
622         if(!(chip->flags&CHIP_CONFIGURED)) {
623                 CANMSG("sja1000p_irq_handler: called for non-configured device, irq_register 0x%02x\n", irq_register);
624                 return CAN_IRQ_NONE;
625         }
626
627         if ((irq_register & IR_RI) != 0) {
628                 DEBUGMSG("sja1000_irq_handler: RI\n");
629                 sja1000p_read(chip,obj);
630                 obj->ret = 0;
631         }
632         if ((irq_register & IR_TI) != 0) {
633                 DEBUGMSG("sja1000_irq_handler: TI\n");
634                 obj->ret = 0;
635                 can_msgobj_set_fl(obj,TX_REQUEST);
636                 while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
637                         can_msgobj_clear_fl(obj,TX_REQUEST);
638
639                         if (can_read_reg(chip, SJASR) & SR_TBS)
640                                 sja1000p_irq_write_handler(chip, obj);
641
642                         can_msgobj_clear_fl(obj,TX_LOCK);
643                         if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
644                         DEBUGMSG("TX looping in sja1000_irq_handler\n");
645                 }
646         }
647         if ((irq_register & (IR_EI|IR_BEI|IR_EPI|IR_DOI)) != 0) { 
648                 // Some error happened
649                 status=can_read_reg(chip,SJASR);
650                 error_code=can_read_reg(chip,SJAECC);
651                 CANMSG("Error: status register: 0x%x irq_register: 0x%02x error: 0x%02x\n",
652                         status, irq_register, error_code);
653 // FIXME: chip should be brought to usable state. Transmission cancelled if in progress.
654 // Reset flag set to 0 if chip is already off the bus. Full state report
655                 obj->ret=-1;
656                 
657                 if(error_code == 0xd9) {
658                         obj->ret= -ENXIO;
659                         /* no such device or address - no ACK received */
660                 }
661                 if(obj->tx_retry_cnt++>MAX_RETR) {
662                         can_write_reg(chip, CMR_AT, SJACMR); // cancel any transmition
663                         obj->tx_retry_cnt = 0;
664                 }
665                 if(status&SR_BS) {
666                         CANMSG("bus-off, resetting sja1000p\n");
667                         can_write_reg(chip, 0, SJAMOD);
668                 }
669                 
670                 if(obj->tx_slot){
671                         canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_BUS);
672                         /*canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
673                         obj->tx_slot=NULL;*/
674                 }
675
676         } else {
677                 obj->tx_retry_cnt=0;
678         }
679
680         return CAN_IRQ_HANDLED;
681 }
682
683 /**
684  * sja1000p_wakeup_tx: - wakeups TX processing
685  * @chip: pointer to chip state structure
686  * @obj: pointer to message object structure
687  *
688  * Function is responsible for initiating message transmition.
689  * It is responsible for clearing of object TX_REQUEST flag
690  *
691  * Return Value: negative value reports error.
692  * File: src/sja1000p.c
693  */
694 int sja1000p_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
695 {
696         
697         can_preempt_disable();
698         
699         can_msgobj_set_fl(obj,TX_REQUEST);
700         while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
701                 can_msgobj_clear_fl(obj,TX_REQUEST);
702
703                 if (can_read_reg(chip, SJASR) & SR_TBS){
704                         obj->tx_retry_cnt=0;
705                         sja1000p_irq_write_handler(chip, obj);
706                 }
707         
708                 can_msgobj_clear_fl(obj,TX_LOCK);
709                 if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
710                 DEBUGMSG("TX looping in sja1000p_wakeup_tx\n");
711         }
712
713         can_preempt_enable();
714         return 0;
715 }
716
717 int sja1000p_register(struct chipspecops_t *chipspecops)
718 {
719         CANMSG("initializing sja1000p chip operations\n");
720         chipspecops->chip_config=sja1000p_chip_config;
721         chipspecops->baud_rate=sja1000p_baud_rate;
722         chipspecops->standard_mask=sja1000p_standard_mask;
723         chipspecops->extended_mask=sja1000p_extended_mask;
724         chipspecops->message15_mask=sja1000p_extended_mask;
725         chipspecops->clear_objects=sja1000p_clear_objects;
726         chipspecops->config_irqs=sja1000p_config_irqs;
727         chipspecops->pre_read_config=sja1000p_pre_read_config;
728         chipspecops->pre_write_config=sja1000p_pre_write_config;
729         chipspecops->send_msg=sja1000p_send_msg;
730         chipspecops->check_tx_stat=sja1000p_check_tx_stat;
731         chipspecops->wakeup_tx=sja1000p_wakeup_tx;
732         chipspecops->remote_request=sja1000p_remote_request;
733         chipspecops->enable_configuration=sja1000p_enable_configuration;
734         chipspecops->disable_configuration=sja1000p_disable_configuration;
735         chipspecops->set_btregs=sja1000p_set_btregs;
736         chipspecops->start_chip=sja1000p_start_chip;
737         chipspecops->stop_chip=sja1000p_stop_chip;
738         chipspecops->irq_handler=sja1000p_irq_handler;
739         return 0;
740 }