1 /**************************************************************************/
2 /* File: mpc5200.c - Freescale MPC5200 MSCAN controller support */
4 /* LinCAN - (Not only) Linux CAN bus driver */
5 /* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
6 /* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
7 /* Copyright (C) 2007-2008 Martin Petera <peterm4@fel.cvut.cz> */
8 /* Funded by OCERA and FRESCOR IST projects */
9 /* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
11 /* LinCAN is free software; you can redistribute it and/or modify it */
12 /* under terms of the GNU General Public License as published by the */
13 /* Free Software Foundation; either version 2, or (at your option) any */
14 /* later version. LinCAN is distributed in the hope that it will be */
15 /* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
16 /* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
17 /* General Public License for more details. You should have received a */
18 /* copy of the GNU General Public License along with LinCAN; see file */
19 /* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
20 /* Cambridge, MA 02139, USA. */
22 /* To allow use of LinCAN in the compact embedded systems firmware */
23 /* and RT-executives (RTEMS for example), main authors agree with next */
24 /* special exception: */
26 /* Including LinCAN header files in a file, instantiating LinCAN generics */
27 /* or templates, or linking other files with LinCAN objects to produce */
28 /* an application image/executable, does not by itself cause the */
29 /* resulting application image/executable to be covered by */
30 /* the GNU General Public License. */
31 /* This exception does not however invalidate any other reasons */
32 /* why the executable file might be covered by the GNU Public License. */
33 /* Publication of enhanced or derived LinCAN files is required although. */
34 /**************************************************************************/
36 #include "../include/can.h"
37 #include "../include/can_sysdep.h"
38 #include "../include/main.h"
39 #include "../include/mpc5200.h"
40 #include "../include/mscan.h"
42 int mpc5200_request_io(struct candevice_t *candev)
44 if (!can_request_io_region(candev->io_addr, candev->nr_all_chips * IO_RANGE, DEVICE_NAME)) {
45 CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
49 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + candev->nr_all_chips * IO_RANGE - 1);
53 int mpc5200_release_io(struct candevice_t *candev)
55 can_release_io_region(candev->io_addr, candev->nr_all_chips * IO_RANGE);
60 int mpc5200_reset(struct candevice_t *candev)
63 DEBUGMSG("Resetting MSCAN chips ...\n");
65 for (i = 0; i < candev->nr_all_chips; i++)
67 /* !!! Assuming this card has ONLY MSCAN chips !!! */
68 if (mscan_reset_chip(candev->chip[i])) return -ENODEV;
74 int mpc5200_init_hw_data(struct candevice_t *candev)
76 /* candev->res_addr = RESET_ADDR; */
77 candev->nr_82527_chips = NR_82527;
78 candev->nr_sja1000_chips = NR_SJA1000;
79 candev->nr_all_chips = NR_ALL;
80 /* candev->flags |= CANDEV_PROGRAMMABLE_IRQ; */
84 int mpc5200_init_chip_data(struct candevice_t *candev, int chipnr)
86 mscan_fill_chipspecops(candev->chip[chipnr]);
88 candev->chip[chipnr]->chip_base_addr = can_ioport2ioptr(candev->io_addr) + chipnr * MPC5200_CAN_CHIP_OFFSET; /* one chip with 2 interfaces */
89 candev->chip[chipnr]->clock = MPC5200_CLK_FREQ;
90 candev->chip[chipnr]->chip_irq = MPC5200_CAN_IRQ + chipnr;
91 candev->chip[chipnr]->hostdevice = candev;
96 int mpc5200_init_obj_data(struct canchip_t *chip, int objnr)
98 /* we have only two chips with only one mailbox each */
99 chip->msgobj[objnr]->obj_base_addr = (can_ioptr_t) MSCAN_CTL0 + MPC5200_CAN_CHIP_OFFSET * objnr;
104 int mpc5200_program_irq(struct candevice_t *candev)
106 /* we don't use programmable interrupt on MPC5200 */
111 void mpc5200_write_register(unsigned data, can_ioptr_t address)
113 /* address is an absolute address */
114 DEBUGMSG("write register\n");
115 writeb(data, address); /* regs in PowerPC (5200) are one-byte length */
118 unsigned mpc5200_read_register(can_ioptr_t address)
120 /* address is an absolute address */
121 DEBUGMSG("read register\n");
122 return readb(address); /* regs in PowerPC (5200) are one-byte length */
125 int mpc5200_register(struct hwspecops_t *hwspecops)
127 hwspecops->request_io = mpc5200_request_io;
128 hwspecops->release_io = mpc5200_release_io;
129 hwspecops->reset = mpc5200_reset;
130 hwspecops->init_hw_data = mpc5200_init_hw_data;
131 hwspecops->init_chip_data = mpc5200_init_chip_data;
132 hwspecops->init_obj_data = mpc5200_init_obj_data;
133 hwspecops->program_irq = mpc5200_program_irq;
134 hwspecops->write_register = mpc5200_write_register;
135 hwspecops->read_register = mpc5200_read_register;