2 * Header file for the Linux CAN-bus driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
5 * email:pisa@cmp.felk.cvut.cz
6 * This software is released under the GPL-License.
7 * Version lincan-0.3 17 Jun 2004
13 #include "./constants.h"
14 #include "./ul_listbase.h"
15 #include "./can_sysless.h"
16 #include "./can_queue.h"
19 #define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "can.o (debug): " fmt,\
22 #define DEBUGMSG(fmt,args...)
25 #define CANMSG(fmt,args...) can_printk(KERN_ERR "can.o: " fmt,##args)
28 extern can_spinlock_t canuser_manipulation_lock;
31 * struct canhardware_t - structure representing pointers to all CAN boards
32 * @nr_boards: number of present boards
33 * @rtr_queue: RTR - remote transmission request queue (expect some changes there)
34 * @rtr_lock: locking for RTR queue
35 * @candevice: array of pointers to CAN devices/boards
37 struct canhardware_t {
39 struct rtr_id *rtr_queue;
40 can_spinlock_t rtr_lock;
41 struct candevice_t *candevice[MAX_HW_CARDS];
45 * struct candevice_t - CAN device/board structure
46 * @hwname: text string with board type
47 * @candev_idx: board index in canhardware_t.candevice[]
48 * @io_addr: IO/physical MEM address
49 * @res_addr: optional reset register port
50 * @dev_base_addr: CPU translated IO/virtual MEM address
51 * @flags: board flags: %PROGRAMMABLE_IRQ .. interrupt number
52 * can be programmed into board
53 * @nr_all_chips: number of chips present on the board
54 * @nr_82527_chips: number of Intel 8257 chips
55 * @nr_sja1000_chips: number of Philips SJA100 chips
56 * @chip: array of pointers to the chip structures
57 * @hwspecops: pointer to board specific operations
58 * @hosthardware_p: pointer to the root hardware structure
59 * @sysdevptr: union reserved for pointer to bus specific
60 * device structure (case @pcidev is used for PCI devices)
62 * The structure represent configuration and state of associated board.
63 * The driver infrastructure prepares this structure and calls
64 * board type specific board_register() function. The board support provided
65 * register function fills right function pointers in @hwspecops structure.
66 * Then driver setup calls functions init_hw_data(), init_chip_data(),
67 * init_chip_data(), init_obj_data() and program_irq(). Function init_hw_data()
68 * and init_chip_data() have to specify number and types of connected chips
69 * or objects respectively.
70 * The use of @nr_all_chips is preferred over use of fields @nr_82527_chips
71 * and @nr_sja1000_chips in the board non-specific functions.
72 * The @io_addr and @dev_base_addr is filled from module parameters
73 * to the same value. The request_io function can fix-up @dev_base_addr
74 * field if virtual address is different than bus address.
77 char *hwname; /* text board type */
78 int candev_idx; /* board index in canhardware_t.candevice[] */
79 unsigned long io_addr; /* IO/physical MEM address */
80 unsigned long res_addr; /* optional reset register port */
81 unsigned long dev_base_addr; /* CPU translated IO/virtual MEM address */
86 can_spinlock_t device_lock;
87 struct canchip_t *chip[MAX_HW_CHIPS];
89 struct hwspecops_t *hwspecops;
91 struct canhardware_t *hosthardware_p;
95 #ifdef CAN_ENABLE_PCI_SUPPORT
96 struct pci_dev *pcidev;
97 #endif /*CAN_ENABLE_PCI_SUPPORT*/
103 * struct canchip_t - CAN chip state and type information
104 * @chip_type: text string describing chip type
105 * @chip_idx: index of the chip in candevice_t.chip[] array
106 * @chip_irq: chip interrupt number if any
107 * @chip_base_addr: chip base address in the CPU IO or virtual memory space
108 * @flags: chip flags: %CHIP_CONFIGURED .. chip is configured,
109 * %CHIP_SEGMENTED .. access to the chip is segmented (mainly for i82527 chips)
110 * @clock: chip base clock frequency in Hz
111 * @baudrate: selected chip baudrate in Hz
112 * @write_register: write chip register function copy
113 * @read_register: read chip register function copy
114 * @chip_data: pointer for optional chip specific data extension
115 * @sja_cdr_reg: SJA specific register -
116 * holds hardware specific options for the Clock Divider
117 * register. Options defined in the sja1000.h file:
118 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
119 * @sja_ocr_reg: SJA specific register -
120 * hold hardware specific options for the Output Control
121 * register. Options defined in the sja1000.h file:
122 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
123 * %OCR_TX0_LH, %OCR_TX1_ZZ.
124 * @int_cpu_reg: Intel specific register -
125 * holds hardware specific options for the CPU Interface
126 * register. Options defined in the i82527.h file:
127 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
128 * @int_clk_reg: Intel specific register -
129 * holds hardware specific options for the Clock Out
130 * register. Options defined in the i82527.h file:
131 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
132 * @int_bus_reg: Intel specific register -
133 * holds hardware specific options for the Bus Configuration
134 * register. Options defined in the i82527.h file:
135 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
136 * @msgobj: array of pointers to individual communication objects
137 * @chipspecops: pointer to the set of chip specific object filled by init_chip_data() function
138 * @hostdevice: pointer to chip hosting board
139 * @max_objects: maximal number of communication objects connected to this chip
140 * @chip_lock: reserved for synchronization of the chip supporting routines
141 * (not used in the current driver version)
142 * @worker_thread: chip worker thread ID (RT-Linux specific field)
143 * @pend_flags: holds information about pending interrupt and tx_wake() operations
144 * (RT-Linux specific field). Masks values:
145 * %MSGOBJ_TX_REQUEST .. some of the message objects requires tx_wake() call,
146 * %MSGOBJ_IRQ_REQUEST .. chip interrupt processing required
147 * %MSGOBJ_WORKER_WAKE .. marks, that worker thread should be waked
148 * for some of above reasons
150 * The fields @write_register and @read_register are copied from
151 * corresponding fields from @hwspecops structure
152 * (chip->hostdevice->hwspecops->write_register and
153 * chip->hostdevice->hwspecops->read_register)
154 * to speedup can_write_reg() and can_read_reg() functions.
158 int chip_idx; /* chip index in candevice_t.chip[] */
160 unsigned long chip_base_addr;
162 long clock; /* Chip clock in Hz */
165 void (*write_register)(unsigned data,unsigned long address);
166 unsigned (*read_register)(unsigned long address);
170 unsigned short sja_cdr_reg; /* sja1000 only! */
171 unsigned short sja_ocr_reg; /* sja1000 only! */
172 unsigned short int_cpu_reg; /* intel 82527 only! */
173 unsigned short int_clk_reg; /* intel 82527 only! */
174 unsigned short int_bus_reg; /* intel 82527 only! */
176 struct msgobj_t *msgobj[MAX_MSGOBJS];
178 struct chipspecops_t *chipspecops;
180 struct candevice_t *hostdevice;
182 int max_objects; /* 1 for sja1000, 15 for i82527 */
184 can_spinlock_t chip_lock;
187 pthread_t worker_thread;
188 unsigned long pend_flags;
189 #endif /*CAN_WITH_RTL*/
193 * struct msgobj_t - structure holding communication object state
195 * @minor: associated device minor number
196 * @object: object number in canchip_t structure +1
197 * @flags: message object flags
198 * @ret: field holding status of the last Tx operation
199 * @qends: pointer to message object corresponding ends structure
200 * @tx_qedge: edge corresponding to transmitted message
201 * @tx_slot: slot holding transmitted message, slot is taken from
202 * canque_test_outslot() call and is freed by canque_free_outslot()
203 * or rescheduled canque_again_outslot()
204 * @tx_retry_cnt: transmission attempt counter
205 * @tx_timeout: can be used by chip driver to check for the transmission timeout
206 * @rx_msg: temporary storage to hold received messages before
207 * calling to canque_filter_msg2edges()
208 * @hostchip: pointer to the &canchip_t structure this object belongs to
209 * @obj_used: counter of users (associated file structures for Linux
210 * userspace clients) of this object
211 * @obj_users: list of user structures of type &canuser_t.
212 * @obj_flags: message object specific flags. Masks values:
213 * %MSGOBJ_TX_REQUEST .. the message object requests TX activation
214 * %MSGOBJ_TX_LOCK .. some IRQ routine or callback on some CPU
215 * is running inside TX activation processing code
216 * @rx_preconfig_id: place to store RX message identifier for some chip types
217 * that reuse same object for TX
220 unsigned long obj_base_addr;
221 unsigned int minor; /* associated device minor number */
222 unsigned int object; /* object number in canchip_t +1 for debug printk */
223 unsigned long obj_flags;
226 struct canque_ends_t *qends;
228 struct canque_edge_t *tx_qedge;
229 struct canque_slot_t *tx_slot;
231 struct timer_list tx_timeout;
233 struct canmsg_t rx_msg;
235 struct canchip_t *hostchip;
237 unsigned long rx_preconfig_id;
240 struct list_head obj_users;
243 #define CAN_USER_MAGIC 0x05402033
246 * struct canuser_t - structure holding CAN user/client state
247 * @flags: used to distinguish Linux/RT-Linux type
248 * @peers: for connection into list of object users
249 * @qends: pointer to the ends structure corresponding for this user
250 * @msgobj: communication object the user is connected to
251 * @rx_edge0: default receive queue for filter IOCTL
252 * @userinfo: stores user context specific information.
253 * The field @fileinfo.file holds pointer to open device file state structure
254 * for the Linux user-space client applications
255 * @magic: magic number to check consistency when pointer is retrieved
256 * from file private field
260 struct list_head peers;
261 struct canque_ends_t *qends;
262 struct msgobj_t *msgobj;
263 struct canque_edge_t *rx_edge0; /* simplifies IOCTL */
266 struct file *file; /* back ptr to file */
270 struct rtl_file *file;
272 #endif /*CAN_WITH_RTL*/
278 * struct hwspecops_t - hardware/board specific operations
279 * @request_io: reserve io or memory range for can board
280 * @release_io: free reserved io memory range
281 * @reset: hardware reset routine
282 * @init_hw_data: called to initialize &candevice_t structure, mainly
283 * @res_add, @nr_all_chips, @nr_82527_chips, @nr_sja1000_chips
285 * @init_chip_data: called initialize each &canchip_t structure, mainly
286 * @chip_type, @chip_base_addr, @clock and chip specific registers.
287 * It is responsible to setup &canchip_t->@chipspecops functions
288 * for non-standard chip types (type other than "i82527", "sja1000" or "sja1000p")
289 * @init_obj_data: called initialize each &msgobj_t structure,
290 * mainly @obj_base_addr field.
291 * @program_irq: program interrupt generation hardware of the board
292 * if flag %PROGRAMMABLE_IRQ is present for specified device/board
293 * @write_register: low level write register routine
294 * @read_register: low level read register routine
297 int (*request_io)(struct candevice_t *candev);
298 int (*release_io)(struct candevice_t *candev);
299 int (*reset)(struct candevice_t *candev);
300 int (*init_hw_data)(struct candevice_t *candev);
301 int (*init_chip_data)(struct candevice_t *candev, int chipnr);
302 int (*init_obj_data)(struct canchip_t *chip, int objnr);
303 int (*program_irq)(struct candevice_t *candev);
304 void (*write_register)(unsigned data,unsigned long address);
305 unsigned (*read_register)(unsigned long address);
309 * struct chipspecops_t - can controller chip specific operations
310 * @chip_config: CAN chip configuration
311 * @baud_rate: set communication parameters
312 * @standard_mask: setup of mask for message filtering
313 * @extended_mask: setup of extended mask for message filtering
314 * @message15_mask: set mask of i82527 message object 15
315 * @clear_objects: clears state of all message object residing in chip
316 * @config_irqs: tunes chip hardware interrupt delivery
317 * @pre_read_config: prepares message object for message reception
318 * @pre_write_config: prepares message object for message transmission
319 * @send_msg: initiate message transmission
320 * @remote_request: configures message object and asks for RTR message
321 * @check_tx_stat: checks state of transmission engine
322 * @wakeup_tx: wakeup TX processing
323 * @filtch_rq: optional routine for propagation of outgoing edges filters to HW
324 * @enable_configuration: enable chip configuration mode
325 * @disable_configuration: disable chip configuration mode
326 * @set_btregs: configures bitrate registers
327 * @attach_to_chip: attaches to the chip, setups registers and possibly state informations
328 * @release_chip: called before chip structure removal if %CHIP_ATTACHED is set
329 * @start_chip: starts chip message processing
330 * @stop_chip: stops chip message processing
331 * @irq_handler: interrupt service routine
332 * @irq_accept: optional fast irq accept routine responsible for blocking further interrupts
334 struct chipspecops_t {
335 int (*chip_config)(struct canchip_t *chip);
336 int (*baud_rate)(struct canchip_t *chip, int rate, int clock, int sjw,
337 int sampl_pt, int flags);
338 int (*standard_mask)(struct canchip_t *chip, unsigned short code,
339 unsigned short mask);
340 int (*extended_mask)(struct canchip_t *chip, unsigned long code,
342 int (*message15_mask)(struct canchip_t *chip, unsigned long code,
344 int (*clear_objects)(struct canchip_t *chip);
345 int (*config_irqs)(struct canchip_t *chip, short irqs);
346 int (*pre_read_config)(struct canchip_t *chip, struct msgobj_t *obj);
347 int (*pre_write_config)(struct canchip_t *chip, struct msgobj_t *obj,
348 struct canmsg_t *msg);
349 int (*send_msg)(struct canchip_t *chip, struct msgobj_t *obj,
350 struct canmsg_t *msg);
351 int (*remote_request)(struct canchip_t *chip, struct msgobj_t *obj);
352 int (*check_tx_stat)(struct canchip_t *chip);
353 int (*wakeup_tx)(struct canchip_t *chip, struct msgobj_t *obj);
354 int (*filtch_rq)(struct canchip_t *chip, struct msgobj_t *obj);
355 int (*enable_configuration)(struct canchip_t *chip);
356 int (*disable_configuration)(struct canchip_t *chip);
357 int (*set_btregs)(struct canchip_t *chip, unsigned short btr0,
358 unsigned short btr1);
359 int (*attach_to_chip)(struct canchip_t *chip);
360 int (*release_chip)(struct canchip_t *chip);
361 int (*start_chip)(struct canchip_t *chip);
362 int (*stop_chip)(struct canchip_t *chip);
363 int (*irq_handler)(int irq, struct canchip_t *chip);
364 int (*irq_accept)(int irq, struct canchip_t *chip);
369 struct mem_addr *next;
373 /* Structure for the RTR queue */
376 struct canmsg_t *rtr_message;
377 wait_queue_head_t rtr_wq;
382 extern int minor[MAX_TOT_CHIPS];
384 extern int baudrate[MAX_TOT_CHIPS];
385 extern char *hw[MAX_HW_CARDS];
386 extern int irq[MAX_IRQ];
387 extern unsigned long io[MAX_HW_CARDS];
388 extern int processlocal;
390 extern struct canhardware_t *hardware_p;
391 extern struct canchip_t *chips_p[MAX_TOT_CHIPS];
392 extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
394 extern struct mem_addr *mem_head;
397 #if defined(CONFIG_OC_LINCAN_PORTIO_ONLY)
398 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
400 outb(data, chip->chip_base_addr+address);
402 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
404 return inb(chip->chip_base_addr+address);
406 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
407 unsigned char data, unsigned address)
409 outb(data, obj->obj_base_addr+address);
411 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
414 return inb(obj->obj_base_addr+address);
417 #elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY)
418 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
420 writeb(data, chip->chip_base_addr+address);
422 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
424 return readb(chip->chip_base_addr+address);
426 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
427 unsigned char data, unsigned address)
429 writeb(data, obj->obj_base_addr+address);
431 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
434 return readb(obj->obj_base_addr+address);
437 #else /*CONFIG_OC_LINCAN_DYNAMICIO*/
438 #ifndef CONFIG_OC_LINCAN_DYNAMICIO
439 #define CONFIG_OC_LINCAN_DYNAMICIO
442 /* Inline function to write to the hardware registers. The argument address is
443 * relative to the memory map of the chip and not the absolute memory address.
445 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
447 unsigned long address_to_write;
448 address_to_write = chip->chip_base_addr+address;
449 chip->write_register(data, address_to_write);
452 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
454 unsigned long address_to_read;
455 address_to_read = chip->chip_base_addr+address;
456 return chip->read_register(address_to_read);
459 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
460 unsigned char data, unsigned address)
462 unsigned long address_to_write;
463 address_to_write = obj->obj_base_addr+address;
464 chip->write_register(data, address_to_write);
467 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
470 unsigned long address_to_read;
471 address_to_read = obj->obj_base_addr+address;
472 return chip->read_register(address_to_read);
475 #endif /*CONFIG_OC_LINCAN_DYNAMICIO*/
477 int can_base_addr_fixup(struct candevice_t *candev, unsigned long new_base);
478 int can_request_io_region(unsigned long start, unsigned long n, const char *name);
479 void can_release_io_region(unsigned long start, unsigned long n);
480 int can_request_mem_region(unsigned long start, unsigned long n, const char *name);
481 void can_release_mem_region(unsigned long start, unsigned long n);
484 const char *boardtype;
485 int (*board_register)(struct hwspecops_t *hwspecops);
489 const struct boardtype_t* boardtype_find(const char *str);
491 int can_check_dev_taken(void *anydev);
493 #if defined(can_gettimeofday) && defined(CAN_MSG_VERSION_2) && 1
495 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
497 can_gettimeofday(ptimestamp);
499 #else /* No timestamp support, set field to zero */
501 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
503 #ifdef CAN_MSG_VERSION_2
504 ptimestamp->tv_sec = 0;
505 ptimestamp->tv_usec = 0;
506 #else /* CAN_MSG_VERSION_2 */
508 #endif /* CAN_MSG_VERSION_2 */
511 #endif /* End of timestamp source selection */
514 extern int can_rtl_priority;
515 #endif /*CAN_WITH_RTL*/