1 /**************************************************************************/
2 /* File: gensja1000mm.c - ISA or generic memory mapped sja1000 CAN cards */
4 /* LinCAN - (Not only) Linux CAN bus driver */
5 /* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
6 /* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
7 /* Funded by OCERA and FRESCOR IST projects */
8 /* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
10 /* LinCAN is free software; you can redistribute it and/or modify it */
11 /* under terms of the GNU General Public License as published by the */
12 /* Free Software Foundation; either version 2, or (at your option) any */
13 /* later version. LinCAN is distributed in the hope that it will be */
14 /* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
15 /* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
16 /* General Public License for more details. You should have received a */
17 /* copy of the GNU General Public License along with LinCAN; see file */
18 /* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
19 /* Cambridge, MA 02139, USA. */
21 /* To allow use of LinCAN in the compact embedded systems firmware */
22 /* and RT-executives (RTEMS for example), main authors agree with next */
23 /* special exception: */
25 /* Including LinCAN header files in a file, instantiating LinCAN generics */
26 /* or templates, or linking other files with LinCAN objects to produce */
27 /* an application image/executable, does not by itself cause the */
28 /* resulting application image/executable to be covered by */
29 /* the GNU General Public License. */
30 /* This exception does not however invalidate any other reasons */
31 /* why the executable file might be covered by the GNU Public License. */
32 /* Publication of enhanced or derived LinCAN files is required although. */
33 /**************************************************************************/
35 #include "../include/can.h"
36 #include "../include/can_sysdep.h"
37 #include "../include/main.h"
38 #include "../include/gensja1000mm.h"
39 #include "../include/sja1000p.h"
42 * IO_RANGE is the io-memory range that gets reserved, please adjust according
43 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
44 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
46 #define IO_RANGE 0x100
49 * gensja1000mm_request_io: - reserve io or memory range for can board
50 * @candev: pointer to candevice/board which asks for io. Field @io_addr
51 * of @candev is used in most cases to define start of the range
53 * The function gensja1000mm_request_io() is used to reserve the io-memory. If your
54 * hardware uses a dedicated memory range as hardware control registers you
55 * will have to add the code to reserve this memory as well.
56 * %IO_RANGE is the io-memory range that gets reserved, please adjust according
57 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
58 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
59 * Return Value: The function returns zero on success or %-ENODEV on failure
60 * File: src/gensja1000mm.c
62 int gensja1000mm_request_io(struct candevice_t *candev)
64 can_ioptr_t remap_addr;
66 if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME)) {
67 CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
70 if ( !( remap_addr = ioremap( candev->io_addr, IO_RANGE ) ) ) {
71 CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
72 can_release_mem_region(candev->io_addr,IO_RANGE);
76 can_base_addr_fixup(candev, remap_addr);
77 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
82 * gensja1000mm_elease_io - free reserved io memory range
83 * @candev: pointer to candevice/board which releases io
85 * The function gensja1000mm_release_io() is used to free reserved io-memory.
86 * In case you have reserved more io memory, don't forget to free it here.
87 * IO_RANGE is the io-memory range that gets released, please adjust according
88 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
89 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
90 * Return Value: The function always returns zero
91 * File: src/gensja1000mm.c
93 int gensja1000mm_release_io(struct candevice_t *candev)
95 /* release I/O memory mapping */
96 iounmap(candev->dev_base_addr);
97 can_release_mem_region(candev->io_addr,IO_RANGE);
103 * gensja1000mm_reset - hardware reset routine
104 * @candev: Pointer to candevice/board structure
106 * The function gensja1000mm_reset() is used to give a hardware reset. This is
107 * rather hardware specific so I haven't included example code. Don't forget to
108 * check the reset status of the chip before returning.
109 * Return Value: The function returns zero on success or %-ENODEV on failure
110 * File: src/gensja1000mm.c
112 int gensja1000mm_reset(struct candevice_t *candev)
115 struct canchip_t *chip=candev->chip[0];
118 gensja1000mm_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
121 cdr=gensja1000mm_read_register(chip->chip_base_addr+SJACDR);
122 gensja1000mm_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
124 gensja1000mm_write_register(0, chip->chip_base_addr+SJAIER);
127 gensja1000mm_write_register(0, chip->chip_base_addr+SJAMOD);
128 while (gensja1000mm_read_register(chip->chip_base_addr+SJAMOD)&sjaMOD_RM){
129 if(!i--) return -ENODEV;
131 gensja1000mm_write_register(0, chip->chip_base_addr+SJAMOD);
134 cdr=gensja1000mm_read_register(chip->chip_base_addr+SJACDR);
135 gensja1000mm_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
137 gensja1000mm_write_register(0, chip->chip_base_addr+SJAIER);
142 #define RESET_ADDR 0x0
147 * gensja1000mm_init_hw_data - Initialize hardware cards
148 * @candev: Pointer to candevice/board structure
150 * The function gensja1000mm_init_hw_data() is used to initialize the hardware
151 * structure containing information about the installed CAN-board.
152 * %RESET_ADDR represents the io-address of the hardware reset register.
153 * %NR_82527 represents the number of intel 82527 chips on the board.
154 * %NR_SJA1000 represents the number of philips sja1000 chips on the board.
155 * The flags entry can currently only be %CANDEV_PROGRAMMABLE_IRQ to indicate that
156 * the hardware uses programmable interrupts.
157 * Return Value: The function always returns zero
158 * File: src/gensja1000mm.c
160 int gensja1000mm_init_hw_data(struct candevice_t *candev)
162 candev->res_addr=RESET_ADDR;
163 candev->nr_82527_chips=0;
164 candev->nr_sja1000_chips=1;
165 candev->nr_all_chips=1;
166 candev->flags |= CANDEV_PROGRAMMABLE_IRQ*0;
172 * gensja1000mm_init_chip_data - Initialize chips
173 * @candev: Pointer to candevice/board structure
174 * @chipnr: Number of the CAN chip on the hardware card
176 * The function gensja1000mm_init_chip_data() is used to initialize the hardware
177 * structure containing information about the CAN chips.
178 * %CHIP_TYPE represents the type of CAN chip. %CHIP_TYPE can be "i82527" or
180 * The @chip_base_addr entry represents the start of the 'official' memory map
181 * of the installed chip. It's likely that this is the same as the @io_addr
182 * argument supplied at module loading time.
183 * The @clock entry holds the chip clock value in Hz.
184 * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
185 * register. Options defined in the %sja1000.h file:
186 * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN
187 * The entry @sja_ocr_reg holds hardware specific options for the Output Control
188 * register. Options defined in the %sja1000.h file:
189 * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK,
190 * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ.
191 * The entry @int_clk_reg holds hardware specific options for the Clock Out
192 * register. Options defined in the %i82527.h file:
193 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
194 * The entry @int_bus_reg holds hardware specific options for the Bus
195 * Configuration register. Options defined in the %i82527.h file:
196 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
197 * The entry @int_cpu_reg holds hardware specific options for the cpu interface
198 * register. Options defined in the %i82527.h file:
199 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
200 * Return Value: The function always returns zero
201 * File: src/gensja1000mm.c
203 int gensja1000mm_init_chip_data(struct candevice_t *candev, int chipnr)
205 /*sja1000_fill_chipspecops(candev->chip[chipnr]);*/
206 sja1000p_fill_chipspecops(candev->chip[chipnr]);
208 candev->chip[chipnr]->chip_base_addr=candev->dev_base_addr;
209 if(candev->chip[chipnr]->clock<=0)
210 candev->chip[chipnr]->clock = 16000000;
211 candev->chip[chipnr]->int_clk_reg = 0x0;
212 candev->chip[chipnr]->int_bus_reg = 0x0;
213 candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
214 candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;
220 * gensja1000mm_init_obj_data - Initialize message buffers
221 * @chip: Pointer to chip specific structure
222 * @objnr: Number of the message buffer
224 * The function gensja1000mm_init_obj_data() is used to initialize the hardware
225 * structure containing information about the different message objects on the
226 * CAN chip. In case of the sja1000 there's only one message object but on the
227 * i82527 chip there are 15.
228 * The code below is for a i82527 chip and initializes the object base addresses
229 * The entry @obj_base_addr represents the first memory address of the message
230 * object. In case of the sja1000 @obj_base_addr is taken the same as the chips
232 * Unless the hardware uses a segmented memory map, flags can be set zero.
233 * Return Value: The function always returns zero
234 * File: src/gensja1000mm.c
236 int gensja1000mm_init_obj_data(struct canchip_t *chip, int objnr)
238 chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
243 * gensja1000mm_program_irq - program interrupts
244 * @candev: Pointer to candevice/board structure
246 * The function gensja1000mm_program_irq() is used for hardware that uses
247 * programmable interrupts. If your hardware doesn't use programmable interrupts
248 * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
249 * leave this function unedited. Again this function is hardware specific so
250 * there's no example code.
251 * Return value: The function returns zero on success or %-ENODEV on failure
252 * File: src/gensja1000mm.c
254 int gensja1000mm_program_irq(struct candevice_t *candev)
260 * gensja1000mm_write_register - Low level write register routine
261 * @data: data to be written
262 * @address: memory address to write to
264 * The function gensja1000mm_write_register() is used to write to hardware registers
265 * on the CAN chip. You should only have to edit this function if your hardware
266 * uses some specific write process.
267 * Return Value: The function does not return a value
268 * File: src/gensja1000mm.c
270 void gensja1000mm_write_register(unsigned data, can_ioptr_t address)
272 /*DEBUGMSG("gensja1000mm_write_register: addr=0x%lx data=0x%x",
274 can_writeb(data,address);
278 * gensja1000mm_read_register - Low level read register routine
279 * @address: memory address to read from
281 * The function gensja1000mm_read_register() is used to read from hardware registers
282 * on the CAN chip. You should only have to edit this function if your hardware
283 * uses some specific read process.
284 * Return Value: The function returns the value stored in @address
285 * File: src/gensja1000mm.c
287 unsigned gensja1000mm_read_register(can_ioptr_t address)
289 return can_readb(address);
292 /* !!! Don't change this function !!! */
293 int gensja1000mm_register(struct hwspecops_t *hwspecops)
295 hwspecops->request_io = gensja1000mm_request_io;
296 hwspecops->release_io = gensja1000mm_release_io;
297 hwspecops->reset = gensja1000mm_reset;
298 hwspecops->init_hw_data = gensja1000mm_init_hw_data;
299 hwspecops->init_chip_data = gensja1000mm_init_chip_data;
300 hwspecops->init_obj_data = gensja1000mm_init_obj_data;
301 hwspecops->write_register = gensja1000mm_write_register;
302 hwspecops->read_register = gensja1000mm_read_register;
303 hwspecops->program_irq = gensja1000mm_program_irq;