1 /* ems_cpcpci.c - support for EMS-WUENSCHE CPC-PCI card
2 * Linux CAN-bus device driver.
3 * The card support added by Paolo Grisleri <grisleri@ce.unipr.it>
4 * This software is released under the GPL-License.
5 * Version lincan-0.2 9 Jul 2003
8 #include "../include/can.h"
9 #include "../include/can_sysdep.h"
10 #include "../include/main.h"
11 #include "../include/sja1000p.h"
13 #ifdef CAN_ENABLE_PCI_SUPPORT
16 /* the only one supported: EMS CPC-PCI */
17 // PGX: check identifiers name
18 # define EMS_CPCPCI_PCICAN_VENDOR 0x110a
19 # define EMS_CPCPCI_PCICAN_ID 0x2104
21 /*The PSB4610 is used as PCI to local bus bridge*/
22 /*BAR0 - MEM - bridge control registers*/
24 /*BAR1 - MEM - parallel interface*/
25 /* 0 more EMS control registers
26 * 0x400 the first SJA1000
27 * 0x600 the second SJA1000
28 * each register occupies 4 bytes
32 #define S5920_OMB 0x0C
33 #define S5920_IMB 0x1C
34 #define S5920_MBEF 0x34
35 #define S5920_INTCSR 0x38
36 #define S5920_RCR 0x3C
37 #define S5920_PTCR 0x60
39 #define INTCSR_ADDON_INTENABLE_M 0x2000
40 #define INTCSR_INTERRUPT_ASSERTED_M 0x800000
42 #define EMS_CPCPCI_BYTES_PER_CIRCUIT 0x200
43 /* Each CPC register occupies 4 bytes */
44 #define EMS_CPCPCI_BYTES_PER_REG 0x4
46 // Standard value: Pushpull (OCTP1|OCTN1|OCTP0|OCTN0|OCM1)
47 #define EMS_CPCPCI_OCR_DEFAULT_STD 0xDA
48 // For Galathea piggyback.
49 #define EMS_CPCPCI_OCR_DEFAULT_GAL 0xDB
53 You need to know the following:
54 " RX1 is connected to ground.
55 " TX1 is not connected.
56 " CLKO is not connected.
57 " Setting the OCR register to 0xDA is a good idea.
58 This means normal output mode , push-pull and the correct polarity.
59 " In the CDR register, you should set CBP to 1.
60 You will probably also want to set the clock divider value to 0 (meaning divide-by-2),
61 the Pelican bit, and the clock-off bit (you have no need for CLKOUT anyway.)
67 void ems_cpcpci_disconnect_irq(struct candevice_t *candev)
70 /* Disable interrupts from card */
71 tmp = inl(candev->dev_base_addr + S5920_INTCSR);
72 tmp &= ~INTCSR_ADDON_INTENABLE_M;
73 outl(tmp, candev->dev_base_addr + S5920_INTCSR);
76 void ems_cpcpci_connect_irq(struct candevice_t *candev)
79 /* Enable interrupts from card */
80 tmp = inl(candev->dev_base_addr + S5920_INTCSR);
81 tmp |= INTCSR_ADDON_INTENABLE_M;
82 outl(tmp, candev->dev_base_addr + S5920_INTCSR);
86 int ems_cpcpci_request_io(struct candevice_t *candev)
88 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
89 if(pci_request_region(candev->sysdevptr.pcidev, 0, "ems_cpcpci_s5920") != 0){
90 CANMSG("Request of ems_cpcpci_s5920 range failed\n");
92 }else if(pci_request_region(candev->sysdevptr.pcidev, 1, "ems_cpcpci_io") != 0){
93 CANMSG("Request of ems_cpcpci_io range failed\n");
95 }else if(pci_request_region(candev->sysdevptr.pcidev, 2, "ems_cpcpci_xilinx") != 0){
96 CANMSG("Request of ems_cpcpci_xilinx range failed\n");
99 #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
100 if(pci_request_regions(candev->sysdevptr.pcidev, "EMS_CPCPCI") != 0){
101 CANMSG("Request of ems_cpcpci_s5920 regions failed\n");
104 #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
106 ems_cpcpci_disconnect_irq(candev);
110 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
112 pci_release_region(candev->sysdevptr.pcidev, 1);
114 pci_release_region(candev->sysdevptr.pcidev, 0);
115 #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
120 int ems_cpcpci_release_io(struct candevice_t *candev)
122 ems_cpcpci_disconnect_irq(candev);
124 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
125 pci_release_region(candev->sysdevptr.pcidev, 2);
126 pci_release_region(candev->sysdevptr.pcidev, 1);
127 pci_release_region(candev->sysdevptr.pcidev, 0);
128 #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
129 pci_release_regions(candev->sysdevptr.pcidev);
130 #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
136 void ems_cpcpci_write_register(unsigned data, unsigned long address)
138 address += ((address&(EMS_CPCPCI_BYTES_PER_CIRCUIT-1))
139 *(EMS_CPCPCI_BYTES_PER_REG-1));
143 unsigned ems_cpcpci_read_register(unsigned long address)
145 address += ((address&(EMS_CPCPCI_BYTES_PER_CIRCUIT-1))
146 *(EMS_CPCPCI_BYTES_PER_REG-1));
150 int ems_cpcpci_reset(struct candevice_t *candev)
156 DEBUGMSG("Resetting EMS_CPCPCI hardware ...\n");
158 /* Assert PTADR# - we're in passive mode so the other bits are not important */
159 outl(0x80808080L, candev->dev_base_addr + S5920_PTCR);
161 ems_cpcpci_disconnect_irq(candev);
163 for(chip_nr=0;chip_nr<candev->nr_all_chips;chip_nr++){
164 if(!candev->chip[chip_nr]) continue;
165 chip=candev->chip[chip_nr];
167 ems_cpcpci_write_register(MOD_RM, chip->chip_base_addr+SJAMOD);
170 cdr=ems_cpcpci_read_register(chip->chip_base_addr+SJACDR);
171 ems_cpcpci_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
173 ems_cpcpci_write_register(0, chip->chip_base_addr+SJAIER);
176 ems_cpcpci_write_register(0, chip->chip_base_addr+SJAMOD);
177 while (ems_cpcpci_read_register(chip->chip_base_addr+SJAMOD)&MOD_RM){
178 if(!i--) return -ENODEV;
180 ems_cpcpci_write_register(0, chip->chip_base_addr+SJAMOD);
183 cdr=ems_cpcpci_read_register(chip->chip_base_addr+SJACDR);
184 ems_cpcpci_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
186 ems_cpcpci_write_register(0, chip->chip_base_addr+SJAIER);
188 ems_cpcpci_read_register(chip->chip_base_addr+SJAIR);
192 ems_cpcpci_connect_irq(candev);
197 int ems_cpcpci_init_hw_data(struct candevice_t *candev)
199 struct pci_dev *pcidev = NULL;
202 pcidev = pci_find_device(EMS_CPCPCI_PCICAN_VENDOR, EMS_CPCPCI_PCICAN_ID, pcidev);
203 if(pcidev == NULL) return -ENODEV;
205 if (pci_enable_device (pcidev)){
206 printk(KERN_CRIT "Setup of EMS_CPCPCI failed\n");
209 candev->sysdevptr.pcidev=pcidev;
212 if(!(pci_resource_flags(pcidev,0)&IORESOURCE_MEM)){
213 printk(KERN_CRIT "EMS_CPCPCI region %d is not memory\n",i);
217 candev->dev_base_addr=pci_resource_start(pcidev,0); /*S5920*/
218 /* some control registers */
219 candev->io_addr=pci_resource_start(pcidev,1);
220 /* 0 more EMS control registers
221 * 0x400 the first SJA1000
222 * 0x600 the second SJA1000
223 * each register occupies 4 bytes
226 /*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
228 if (!strcmp(candev->hwname,"ems_cpcpci")) {
229 candev->nr_82527_chips=0;
230 candev->nr_sja1000_chips=2;
231 candev->nr_all_chips=2;
237 int ems_cpcpci_init_chip_data(struct candevice_t *candev, int chipnr)
240 if(candev->sysdevptr.pcidev==NULL)
243 candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
245 candev->chip[chipnr]->chip_type="sja1000p";
246 candev->chip[chipnr]->chip_base_addr = candev->io_addr+
247 0x400 + chipnr*EMS_CPCPCI_BYTES_PER_CIRCUIT;
248 candev->chip[chipnr]->flags = 0;
249 candev->chip[chipnr]->int_cpu_reg = 0;
250 candev->chip[chipnr]->int_clk_reg = 0;
251 candev->chip[chipnr]->int_bus_reg = 0;
252 candev->chip[chipnr]->sja_cdr_reg = CDR_CBP | CDR_CLK_OFF;
253 candev->chip[chipnr]->sja_ocr_reg = EMS_CPCPCI_OCR_DEFAULT_STD;
254 candev->chip[chipnr]->clock = 8000000;
255 candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
260 int ems_cpcpci_init_obj_data(struct chip_t *chip, int objnr)
262 chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
266 int ems_cpcpci_program_irq(struct candevice_t *candev)
272 int ems_cpcpci_register(struct hwspecops_t *hwspecops)
274 hwspecops->request_io = ems_cpcpci_request_io;
275 hwspecops->release_io = ems_cpcpci_release_io;
276 hwspecops->reset = ems_cpcpci_reset;
277 hwspecops->init_hw_data = ems_cpcpci_init_hw_data;
278 hwspecops->init_chip_data = ems_cpcpci_init_chip_data;
279 hwspecops->init_obj_data = ems_cpcpci_init_obj_data;
280 hwspecops->write_register = ems_cpcpci_write_register;
281 hwspecops->read_register = ems_cpcpci_read_register;
282 hwspecops->program_irq = ems_cpcpci_program_irq;
287 #endif /*CAN_ENABLE_PCI_SUPPORT*/