2 * Linux CAN-bus device driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * This software is released under the GPL-License.
5 * Version 0.7 6 Aug 2001
8 /* This file is intended as a bfadcan file for currently unsupported hardware.
9 * Once you've changed/added the functions specific to your hardware it is
10 * possible to load the driver with the hardware option hw=bfadcan.
13 #define __NO_VERSION__ /* this is not a main module, do not include module info */
15 #include <linux/autoconf.h>
16 #if defined (CONFIG_MODVERSIONS) && !defined (MODVERSIONS)
20 #if defined (MODVERSIONS)
21 #include <linux/modversions.h>
23 #include <linux/module.h>
25 #include <linux/version.h>
26 #include <linux/ioport.h>
27 #include <linux/delay.h>
28 #include <asm/errno.h>
31 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,3,0))
32 #include <asm/spinlock.h>
34 #include <linux/spinlock.h>
37 #define WINDOWED_ACCESS
39 #include "../include/main.h"
40 #include "../include/i82527.h"
41 #include "../include/sja1000p.h"
44 MODULE_PARM(clock_freq,"i");
46 /* cli and sti are not allowed in 2.5.5x SMP kernels */
47 #ifdef WINDOWED_ACCESS
48 spinlock_t bfadcan_win_lock=SPIN_LOCK_UNLOCKED;
52 * IO_RANGE is the io-memory range that gets reserved, please adjust according
53 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
54 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
56 #ifdef WINDOWED_ACCESS
59 #define IO_RANGE 0x100
62 unsigned bfadcan_read_register(unsigned long address);
63 void bfadcan_write_register(unsigned char data, unsigned long address);
67 * bfadcan_request_io: - reserve io memory
68 * @io_addr: The reserved memory starts at @io_addr, wich is the module
71 * The function bfadcan_request_io() is used to reserve the io-memory. If your
72 * hardware uses a dedicated memory range as hardware control registers you
73 * will have to add the code to reserve this memory as well.
74 * %IO_RANGE is the io-memory range that gets reserved, please adjust according
75 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
76 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
77 * Return Value: The function returns zero on success or %-ENODEV on failure
80 int bfadcan_request_io(unsigned long io_addr)
82 if (check_region(io_addr,IO_RANGE)) {
83 CANMSG("Unable to open port: 0x%lx\n",io_addr);
87 request_region(io_addr,IO_RANGE,DEVICE_NAME);
88 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", io_addr, io_addr + IO_RANGE - 1);
94 * bfadcan_release_io - free reserved io-memory
95 * @io_addr: Start of the memory range to be released.
97 * The function bfadcan_release_io() is used to free reserved io-memory.
98 * In case you have reserved more io memory, don't forget to free it here.
99 * IO_RANGE is the io-memory range that gets released, please adjust according
100 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
101 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
102 * Return Value: The function always returns zero
103 * File: src/bfadcan.c
105 int bfadcan_release_io(unsigned long io_addr)
107 release_region(io_addr,IO_RANGE);
113 * bfadcan_reset - hardware reset routine
114 * @card: Number of the hardware card.
116 * The function bfadcan_reset() is used to give a hardware reset. This is
117 * rather hardware specific so I haven't included example code. Don't forget to
118 * check the reset status of the chip before returning.
119 * Return Value: The function returns zero on success or %-ENODEV on failure
120 * File: src/bfadcan.c
122 int bfadcan_reset(int card)
126 struct chip_t *chip=candevices_p[card]->chip[0];
129 bfadcan_write_register(MOD_RM, chip->chip_base_addr+SJAMOD);
132 cdr=bfadcan_read_register(chip->chip_base_addr+SJACDR);
133 bfadcan_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
135 bfadcan_write_register(0, chip->chip_base_addr+SJAIER);
138 bfadcan_write_register(0, chip->chip_base_addr+SJAMOD);
139 while (bfadcan_read_register(chip->chip_base_addr+SJAMOD)&MOD_RM){
140 if(!i--) return -ENODEV;
142 bfadcan_write_register(0, chip->chip_base_addr+SJAMOD);
145 cdr=bfadcan_read_register(chip->chip_base_addr+SJACDR);
146 bfadcan_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
148 bfadcan_write_register(0, chip->chip_base_addr+SJAIER);
153 #define RESET_ADDR 0x202
158 * bfadcan_init_hw_data - Initialze hardware cards
159 * @card: Number of the hardware card.
161 * The function bfadcan_init_hw_data() is used to initialize the hardware
162 * structure containing information about the installed CAN-board.
163 * %RESET_ADDR represents the io-address of the hardware reset register.
164 * %NR_82527 represents the number of intel 82527 chips on the board.
165 * %NR_SJA1000 represents the number of philips sja1000 chips on the board.
166 * The flags entry can currently only be %PROGRAMMABLE_IRQ to indicate that
167 * the hardware uses programmable interrupts.
168 * Return Value: The function always returns zero
169 * File: src/bfadcan.c
171 int bfadcan_init_hw_data(int card)
173 candevices_p[card]->res_addr=RESET_ADDR;
174 candevices_p[card]->nr_82527_chips=NR_82527;
175 candevices_p[card]->nr_sja1000_chips=NR_SJA1000;
176 candevices_p[card]->flags |= 0 /* PROGRAMMABLE_IRQ */ ;
181 #define CHIP_TYPE "sja1000p"
183 * bfadcan_init_chip_data - Initialize chips
184 * @card: Number of the hardware card
185 * @chipnr: Number of the CAN chip on the hardware card
187 * The function bfadcan_init_chip_data() is used to initialize the hardware
188 * structure containing information about the CAN chips.
189 * %CHIP_TYPE represents the type of CAN chip. %CHIP_TYPE can be "i82527" or
191 * The @chip_base_addr entry represents the start of the 'official' memory map
192 * of the installed chip. It's likely that this is the same as the @io_addr
193 * argument supplied at module loading time.
194 * The @clock entry holds the chip clock value in Hz.
195 * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
196 * register. Options defined in the %sja1000.h file:
197 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
198 * The entry @sja_ocr_reg holds hardware specific options for the Output Control
199 * register. Options defined in the %sja1000.h file:
200 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
201 * %OCR_TX0_LH, %OCR_TX1_ZZ.
202 * The entry @int_clk_reg holds hardware specific options for the Clock Out
203 * register. Options defined in the %i82527.h file:
204 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
205 * The entry @int_bus_reg holds hardware specific options for the Bus
206 * Configuration register. Options defined in the %i82527.h file:
207 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
208 * The entry @int_cpu_reg holds hardware specific options for the cpu interface
209 * register. Options defined in the %i82527.h file:
210 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
211 * Return Value: The function always returns zero
212 * File: src/bfadcan.c
214 int bfadcan_init_chip_data(int card, int chipnr)
216 unsigned int id1, id2;
217 candevices_p[card]->chip[chipnr]->chip_type=CHIP_TYPE;
218 candevices_p[card]->chip[chipnr]->chip_base_addr=candevices_p[card]->io_addr;
219 candevices_p[card]->chip[chipnr]->clock = clock_freq;
220 candevices_p[card]->chip[chipnr]->int_cpu_reg = iCPU_DSC;
221 candevices_p[card]->chip[chipnr]->int_clk_reg = iCLK_SL1;
222 candevices_p[card]->chip[chipnr]->int_bus_reg = iBUS_CBY;
223 candevices_p[card]->chip[chipnr]->sja_cdr_reg = CDR_CBP | CDR_CLK_OFF;
224 candevices_p[card]->chip[chipnr]->sja_ocr_reg = OCR_MODE_NORMAL |
230 CANMSG("can driver ver 0.7.1-tm5, at %04lx, CPLD v%d.%d.%d.%d\n",
231 candevices_p[card]->chip[chipnr]->chip_base_addr,
232 id1>>4, id1&0x0f, id2>>4, id2&0x0f);
239 * bfadcan_init_obj_data - Initialize message buffers
240 * @chipnr: Number of the CAN chip
241 * @objnr: Number of the message buffer
243 * The function bfadcan_init_obj_data() is used to initialize the hardware
244 * structure containing information about the different message objects on the
245 * CAN chip. In case of the sja1000 there's only one message object but on the
246 * i82527 chip there are 15.
247 * The code below is for a i82527 chip and initializes the object base addresses
248 * The entry @obj_base_addr represents the first memory address of the message
249 * object. In case of the sja1000 @obj_base_addr is taken the same as the chips
251 * Unless the hardware uses a segmented memory map, flags can be set zero.
252 * Return Value: The function always returns zero
253 * File: src/bfadcan.c
255 int bfadcan_init_obj_data(int chipnr, int objnr)
257 chips_p[chipnr]->msgobj[objnr]->obj_base_addr=chips_p[chipnr]->chip_base_addr+(objnr+1)*0x10;
258 chips_p[chipnr]->msgobj[objnr]->flags=0;
264 * bfadcan_program_irq - program interrupts
265 * @card: Number of the hardware card.
267 * The function bfadcan_program_irq() is used for hardware that uses
268 * programmable interrupts. If your hardware doesn't use programmable interrupts
269 * you should not set the @candevices_t->flags entry to %PROGRAMMABLE_IRQ and
270 * leave this function unedited. Again this function is hardware specific so
271 * there's no example code.
272 * Return value: The function returns zero on success or %-ENODEV on failure
273 * File: src/bfadcan.c
275 int bfadcan_program_irq(int card)
281 * bfadcan_write_register - Low level write register routine
282 * @data: data to be written
283 * @address: memory address to write to
285 * The function bfadcan_write_register() is used to write to hardware registers
286 * on the CAN chip. You should only have to edit this function if your hardware
287 * uses some specific write process.
288 * Return Value: The function does not return a value
289 * File: src/bfadcan.c
291 void bfadcan_write_register(unsigned char data, unsigned long address)
293 #ifdef WINDOWED_ACCESS
295 spin_lock_irqsave(&bfadcan_win_lock,flags);
296 outb(address&0x00ff,0x200);
298 spin_unlock_irqrestore(&bfadcan_win_lock,flags);
305 * bfadcan_read_register - Low level read register routine
306 * @address: memory address to read from
308 * The function bfadcan_read_register() is used to read from hardware registers
309 * on the CAN chip. You should only have to edit this function if your hardware
310 * uses some specific read process.
311 * Return Value: The function returns the value stored in @address
312 * File: src/bfadcan.c
314 unsigned bfadcan_read_register(unsigned long address)
316 #ifdef WINDOWED_ACCESS
319 spin_lock_irqsave(&bfadcan_win_lock,flags);
320 outb(address&0x00ff,0x200);
322 spin_unlock_irqrestore(&bfadcan_win_lock,flags);
329 /* !!! Don't change this function !!! */
330 int bfadcan_register(struct hwspecops_t *hwspecops)
332 hwspecops->request_io = bfadcan_request_io;
333 hwspecops->release_io = bfadcan_release_io;
334 hwspecops->reset = bfadcan_reset;
335 hwspecops->init_hw_data = bfadcan_init_hw_data;
336 hwspecops->init_chip_data = bfadcan_init_chip_data;
337 hwspecops->init_obj_data = bfadcan_init_obj_data;
338 hwspecops->write_register = bfadcan_write_register;
339 hwspecops->read_register = bfadcan_read_register;
340 hwspecops->program_irq = bfadcan_program_irq;