2 * Header file for the Linux CAN-bus driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
5 * email:pisa@cmp.felk.cvut.cz
6 * This software is released under the GPL-License.
7 * Version lincan-0.2 9 Jul 2003
11 #include "./constants.h"
12 #include "./can_sysdep.h"
13 #include "./can_queue.h"
14 #include "lincan_config.h"
17 #define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "can.o (debug): " fmt,\
20 #define DEBUGMSG(fmt,args...)
23 #define CANMSG(fmt,args...) can_printk(KERN_ERR "can.o: " fmt,##args)
26 extern can_spinlock_t canuser_manipulation_lock;
29 * struct canhardware_t - structure representing pointers to all CAN boards
30 * @nr_boards: number of present boards
31 * @rtr_queue: RTR - remote transmission request queue (expect some changes there)
32 * @rtr_lock: locking for RTR queue
33 * @candevice: array of pointers to CAN devices/boards
35 struct canhardware_t {
37 struct rtr_id *rtr_queue;
38 can_spinlock_t rtr_lock;
39 struct candevice_t *candevice[MAX_HW_CARDS];
43 * struct candevice_t - CAN device/board structure
44 * @hwname: text string with board type
45 * @candev_idx: board index in canhardware_t.candevice[]
46 * @io_addr: IO/physical MEM address
47 * @res_addr: optional reset register port
48 * @dev_base_addr: CPU translated IO/virtual MEM address
49 * @flags: board flags: %PROGRAMMABLE_IRQ .. interrupt number
50 * can be programmed into board
51 * @nr_all_chips: number of chips present on the board
52 * @nr_82527_chips: number of Intel 8257 chips
53 * @nr_sja1000_chips: number of Philips SJA100 chips
54 * @chip: array of pointers to the chip structures
55 * @hwspecops: pointer to board specific operations
56 * @hosthardware_p: pointer to the root hardware structure
57 * @sysdevptr: union reserved for pointer to bus specific
58 * device structure (case @pcidev is used for PCI devices)
60 * The structure represent configuration and state of associated board.
61 * The driver infrastructure prepares this structure and calls
62 * board type specific board_register() function. The board support provided
63 * register function fills right function pointers in @hwspecops structure.
64 * Then driver setup calls functions init_hw_data(), init_chip_data(),
65 * init_chip_data(), init_obj_data() and program_irq(). Function init_hw_data()
66 * and init_chip_data() have to specify number and types of connected chips
67 * or objects respectively.
68 * The use of @nr_all_chips is preferred over use of fields @nr_82527_chips
69 * and @nr_sja1000_chips in the board non-specific functions.
70 * The @io_addr and @dev_base_addr is filled from module parameters
71 * to the same value. The request_io function can fix-up @dev_base_addr
72 * field if virtual address is different than bus address.
75 char *hwname; /* text board type */
76 int candev_idx; /* board index in canhardware_t.candevice[] */
77 unsigned long io_addr; /* IO/physical MEM address */
78 unsigned long res_addr; /* optional seset register port */
79 unsigned long dev_base_addr; /* CPU translated IO/virtual MEM address */
84 struct chip_t *chip[MAX_HW_CHIPS];
86 struct hwspecops_t *hwspecops;
88 struct canhardware_t *hosthardware_p;
91 #ifdef CAN_ENABLE_PCI_SUPPORT
92 struct pci_dev *pcidev;
93 #endif /*CAN_ENABLE_PCI_SUPPORT*/
99 * struct chip_t - CAN chip state and type information
100 * @chip_type: text string describing chip type
101 * @chip_idx: index of the chip in candevice_t.chip[] array
102 * @chip_irq: chip interrupt number if any
103 * @chip_base_addr: chip base address in the CPU IO or virtual memory space
104 * @flags: chip flags: %CHIP_CONFIGURED .. chip is configured,
105 * %CHIP_SEGMENTED .. access to the chip is segmented (mainly for i82527 chips)
106 * @clock: chip base clock frequency in Hz
107 * @baudrate: selected chip baudrate in Hz
108 * @write_register: write chip register function copy
109 * @read_register: read chip register function copy
110 * @chip_data: pointer for optional chip specific data extension
111 * @sja_cdr_reg: SJA specific register -
112 * holds hardware specific options for the Clock Divider
113 * register. Options defined in the sja1000.h file:
114 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
115 * @sja_ocr_reg: SJA specific register -
116 * hold hardware specific options for the Output Control
117 * register. Options defined in the sja1000.h file:
118 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
119 * %OCR_TX0_LH, %OCR_TX1_ZZ.
120 * @int_cpu_reg: Intel specific register -
121 * holds hardware specific options for the CPU Interface
122 * register. Options defined in the i82527.h file:
123 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
124 * @int_clk_reg: Intel specific register -
125 * holds hardware specific options for the Clock Out
126 * register. Options defined in the i82527.h file:
127 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
128 * @int_bus_reg: Intel specific register -
129 * holds hardware specific options for the Bus Configuration
130 * register. Options defined in the i82527.h file:
131 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
132 * @msgobj: array of pointers to individual communication objects
133 * @chipspecops: pointer to the set of chip specific object filled by init_chip_data() function
134 * @hostdevice: pointer to chip hosting board
135 * @max_objects: maximal number of communication objects connected to this chip
136 * @chip_lock: reserved for synchronization of the chip supporting routines
137 * (not used in the current driver version)
138 * @worker_thread: chip worker thread ID (RT-Linux specific field)
139 * @pend_flags: holds information about pending interrupt and tx_wake() operations
140 * (RT-Linux specific field). Masks values:
141 * %MSGOBJ_TX_REQUEST .. some of the message objects requires tx_wake() call,
142 * %MSGOBJ_IRQ_REQUEST .. chip interrupt processing required
143 * %MSGOBJ_WORKER_WAKE .. marks, that worker thread should be waked
144 * for some of above reasons
146 * The fields @write_register and @read_register are copied from
147 * corresponding fields from @hwspecops structure
148 * (chip->hostdevice->hwspecops->write_register and
149 * chip->hostdevice->hwspecops->read_register)
150 * to speedup can_write_reg() and can_read_reg() functions.
154 int chip_idx; /* chip index in candevice_t.chip[] */
156 unsigned long chip_base_addr;
158 long clock; /* Chip clock in Hz */
161 void (*write_register)(unsigned char data,unsigned long address);
162 unsigned (*read_register)(unsigned long address);
166 unsigned short sja_cdr_reg; /* sja1000 only! */
167 unsigned short sja_ocr_reg; /* sja1000 only! */
168 unsigned short int_cpu_reg; /* intel 82527 only! */
169 unsigned short int_clk_reg; /* intel 82527 only! */
170 unsigned short int_bus_reg; /* intel 82527 only! */
172 struct msgobj_t *msgobj[MAX_MSGOBJS];
174 struct chipspecops_t *chipspecops;
176 struct candevice_t *hostdevice;
178 int max_objects; /* 1 for sja1000, 15 for i82527 */
180 can_spinlock_t chip_lock;
183 pthread_t worker_thread;
184 unsigned long pend_flags;
185 #endif /*CAN_WITH_RTL*/
189 * struct msgobj_t - structure holding communication object state
191 * @minor: associated device minor number
192 * @object: object number in chip_t structure +1
193 * @flags: message object flags
194 * @ret: field holding status of the last Tx operation
195 * @qends: pointer to message object corresponding ends structure
196 * @tx_qedge: edge corresponding to transmitted message
197 * @tx_slot: slot holding transmitted message, slot is taken from
198 * canque_test_outslot() call and is freed by canque_free_outslot()
199 * or rescheduled canque_again_outslot()
200 * @tx_retry_cnt: transmission attempt counter
201 * @tx_timeout: can be used by chip driver to check for the transmission timeout
202 * @rx_msg: temporary storage to hold received messages before
203 * calling to canque_filter_msg2edges()
204 * @hostchip: pointer to the &chip_t structure this object belongs to
205 * @obj_used: counter of users (associated file structures for Linux
206 * userspace clients) of this object
207 * @obj_users: list of user structures of type &canuser_t.
208 * @obj_flags: message object specific flags. Masks values:
209 * %MSGOBJ_TX_REQUEST .. the message object requests TX activation
210 * %MSGOBJ_TX_LOCK .. some IRQ routine or callback on some CPU
211 * is running inside TX activation processing code
214 unsigned long obj_base_addr;
215 unsigned int minor; /* associated device minor number */
216 unsigned int object; /* object number in chip_t +1 for debug printk */
217 unsigned long obj_flags;
220 struct canque_ends_t *qends;
222 struct canque_edge_t *tx_qedge;
223 struct canque_slot_t *tx_slot;
225 struct timer_list tx_timeout;
227 struct canmsg_t rx_msg;
229 struct chip_t *hostchip;
232 struct list_head obj_users;
235 #define CAN_USER_MAGIC 0x05402033
238 * struct canuser_t - structure holding CAN user/client state
239 * @flags: used to distinguish Linux/RT-Linux type
240 * @peers: for connection into list of object users
241 * @qends: pointer to the ends structure corresponding for this user
242 * @msgobj: communication object the user is connected to
243 * @rx_edge0: default receive queue for filter IOCTL
244 * @userinfo: stores user context specific information.
245 * The field @fileinfo.file holds pointer to open device file state structure
246 * for the Linux user-space client applications
247 * @magic: magic number to check consistency when pointer is retrieved
248 * from file private field
252 struct list_head peers;
253 struct canque_ends_t *qends;
254 struct msgobj_t *msgobj;
255 struct canque_edge_t *rx_edge0; /* simplifies IOCTL */
258 struct file *file; /* back ptr to file */
262 struct rtl_file *file;
264 #endif /*CAN_WITH_RTL*/
270 * struct hwspecops_t - hardware/board specific operations
271 * @request_io: reserve io or memory range for can board
272 * @release_io: free reserved io memory range
273 * @reset: hardware reset routine
274 * @init_hw_data: called to initialize &candevice_t structure, mainly
275 * @res_add, @nr_all_chips, @nr_82527_chips, @nr_sja1000_chips
277 * @init_chip_data: called initialize each &chip_t structure, mainly
278 * @chip_type, @chip_base_addr, @clock and chip specific registers.
279 * It is responsible to setup &chip_t->@chipspecops functions
280 * for non-standard chip types (type other than "i82527", "sja1000" or "sja1000p")
281 * @init_obj_data: called initialize each &msgobj_t structure,
282 * mainly @obj_base_addr field.
283 * @program_irq: program interrupt generation hardware of the board
284 * if flag %PROGRAMMABLE_IRQ is present for specified device/board
285 * @write_register: low level write register routine
286 * @read_register: low level read register routine
289 int (*request_io)(struct candevice_t *candev);
290 int (*release_io)(struct candevice_t *candev);
291 int (*reset)(struct candevice_t *candev);
292 int (*init_hw_data)(struct candevice_t *candev);
293 int (*init_chip_data)(struct candevice_t *candev, int chipnr);
294 int (*init_obj_data)(struct chip_t *chip, int objnr);
295 int (*program_irq)(struct candevice_t *candev);
296 void (*write_register)(unsigned char data,unsigned long address);
297 unsigned (*read_register)(unsigned long address);
301 * struct chipspecops_t - can controller chip specific operations
302 * @chip_config: CAN chip configuration
303 * @baud_rate: set communication parameters
304 * @standard_mask: setup of mask for message filtering
305 * @extended_mask: setup of extended mask for message filtering
306 * @message15_mask: set mask of i82527 message object 15
307 * @clear_objects: clears state of all message object residing in chip
308 * @config_irqs: tunes chip hardware interrupt delivery
309 * @pre_read_config: prepares message object for message reception
310 * @pre_write_config: prepares message object for message transmission
311 * @send_msg: initiate message transmission
312 * @remote_request: configures message object and asks for RTR message
313 * @check_tx_stat: checks state of transmission engine
314 * @wakeup_tx: wakeup TX processing
315 * @filtch_rq: optional routine for propagation of outgoing edges filters to HW
316 * @enable_configuration: enable chip configuration mode
317 * @disable_configuration: disable chip configuration mode
318 * @set_btregs: configures bitrate registers
319 * @start_chip: starts chip message processing
320 * @stop_chip: stops chip message processing
321 * @irq_handler: interrupt service routine
323 struct chipspecops_t {
324 int (*chip_config)(struct chip_t *chip);
325 int (*baud_rate)(struct chip_t *chip, int rate, int clock, int sjw,
326 int sampl_pt, int flags);
327 int (*standard_mask)(struct chip_t *chip, unsigned short code,
328 unsigned short mask);
329 int (*extended_mask)(struct chip_t *chip, unsigned long code,
331 int (*message15_mask)(struct chip_t *chip, unsigned long code,
333 int (*clear_objects)(struct chip_t *chip);
334 int (*config_irqs)(struct chip_t *chip, short irqs);
335 int (*pre_read_config)(struct chip_t *chip, struct msgobj_t *obj);
336 int (*pre_write_config)(struct chip_t *chip, struct msgobj_t *obj,
337 struct canmsg_t *msg);
338 int (*send_msg)(struct chip_t *chip, struct msgobj_t *obj,
339 struct canmsg_t *msg);
340 int (*remote_request)(struct chip_t *chip, struct msgobj_t *obj);
341 int (*check_tx_stat)(struct chip_t *chip);
342 int (*wakeup_tx)(struct chip_t *chip, struct msgobj_t *obj);
343 int (*filtch_rq)(struct chip_t *chip, struct msgobj_t *obj);
344 int (*enable_configuration)(struct chip_t *chip);
345 int (*disable_configuration)(struct chip_t *chip);
346 int (*set_btregs)(struct chip_t *chip, unsigned short btr0,
347 unsigned short btr1);
348 int (*start_chip)(struct chip_t *chip);
349 int (*stop_chip)(struct chip_t *chip);
350 can_irqreturn_t (*irq_handler)(int irq, void *dev_id, struct pt_regs *regs);
355 struct mem_addr *next;
359 /* Structure for the RTR queue */
362 struct canmsg_t *rtr_message;
363 wait_queue_head_t rtr_wq;
368 extern int minor[MAX_TOT_CHIPS];
370 extern int baudrate[MAX_TOT_CHIPS];
371 extern char *hw[MAX_HW_CARDS];
372 extern int irq[MAX_IRQ];
373 extern unsigned long io[MAX_HW_CARDS];
374 extern int processlocal;
376 extern struct canhardware_t *hardware_p;
377 extern struct chip_t *chips_p[MAX_TOT_CHIPS];
378 extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
380 extern struct mem_addr *mem_head;
383 #if defined(CONFIG_OC_LINCAN_PORTIO_ONLY)
384 extern inline void can_write_reg(const struct chip_t *chip, unsigned char data, unsigned address)
386 outb(data, chip->chip_base_addr+address);
388 extern inline unsigned can_read_reg(const struct chip_t *chip, unsigned address)
390 return inb(chip->chip_base_addr+address);
392 extern inline void canobj_write_reg(const struct chip_t *chip, const struct msgobj_t *obj,
393 unsigned char data, unsigned address)
395 outb(data, obj->obj_base_addr+address);
397 extern inline unsigned canobj_read_reg(const struct chip_t *chip, const struct msgobj_t *obj,
400 return inb(obj->obj_base_addr+address);
403 #elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY)
404 extern inline void can_write_reg(const struct chip_t *chip, unsigned char data, unsigned address)
406 writeb(data, chip->chip_base_addr+address);
408 extern inline unsigned can_read_reg(const struct chip_t *chip, unsigned address)
410 return readb(chip->chip_base_addr+address);
412 extern inline void canobj_write_reg(const struct chip_t *chip, const struct msgobj_t *obj,
413 unsigned char data, unsigned address)
415 writeb(data, obj->obj_base_addr+address);
417 extern inline unsigned canobj_read_reg(const struct chip_t *chip, const struct msgobj_t *obj,
420 return readb(obj->obj_base_addr+address);
423 #else /*CONFIG_OC_LINCAN_DYNAMICIO*/
424 #ifndef CONFIG_OC_LINCAN_DYNAMICIO
425 #define CONFIG_OC_LINCAN_DYNAMICIO
428 /* Inline function to write to the hardware registers. The argument address is
429 * relative to the memory map of the chip and not the absolute memory address.
431 extern inline void can_write_reg(const struct chip_t *chip, unsigned char data, unsigned address)
433 unsigned long address_to_write;
434 address_to_write = chip->chip_base_addr+address;
435 chip->write_register(data, address_to_write);
438 extern inline unsigned can_read_reg(const struct chip_t *chip, unsigned address)
440 unsigned long address_to_read;
441 address_to_read = chip->chip_base_addr+address;
442 return chip->read_register(address_to_read);
445 extern inline void canobj_write_reg(const struct chip_t *chip, const struct msgobj_t *obj,
446 unsigned char data, unsigned address)
448 unsigned long address_to_write;
449 address_to_write = obj->obj_base_addr+address;
450 chip->write_register(data, address_to_write);
453 extern inline unsigned canobj_read_reg(const struct chip_t *chip, const struct msgobj_t *obj,
456 unsigned long address_to_read;
457 address_to_read = obj->obj_base_addr+address;
458 return chip->read_register(address_to_read);
461 #endif /*CONFIG_OC_LINCAN_DYNAMICIO*/
463 int can_base_addr_fixup(struct candevice_t *candev, unsigned long new_base);
464 int can_request_io_region(unsigned long start, unsigned long n, const char *name);
465 void can_release_io_region(unsigned long start, unsigned long n);
466 int can_request_mem_region(unsigned long start, unsigned long n, const char *name);
467 void can_release_mem_region(unsigned long start, unsigned long n);
470 const char *boardtype;
471 int (*board_register)(struct hwspecops_t *hwspecops);
475 const struct boardtype_t* boardtype_find(const char *str);
478 extern int can_rtl_priority;
479 #endif /*CAN_WITH_RTL*/