1 /******************************************************************************
3 * $RCSfile: lpcSPI.h,v $
6 * Header file for Philips LPC ARM Processors.
7 * Copyright 2004 R O SoftWare
9 * No guarantees, warrantees, or promises, implied or otherwise.
10 * May be used for hobby or commercial purposes provided copyright
11 * notice remains intact.
13 *****************************************************************************/
17 // Serial Peripheral Interface Registers (SPI)
20 REG_8 cr; // Control Register
22 REG_8 sr; // Status Register
24 REG_8 dr; // Data Register
26 REG_8 ccr; // Clock Counter Register
28 REG_8 tcr; // Test Control Register
30 REG_8 tsr; // Test Status Register
32 REG_8 tor; // Test Observe Register
34 REG_8 flag; // Interrupt Flag Register
39 // SPI Control Register
40 #define SPCR_BE (1 << 2) // BitEnable : If set the SPI controller
41 // sends and receives the number of bits
42 // selected by bits 11:8.
43 #define SPCR_CPHA (1 << 3) // Clock phase control
44 #define SPCR_CPOL (1 << 4) // Clock polarity control.
45 #define SPCR_MSTR (1 << 5) // Master mode select.
46 #define SPCR_LSBF (1 << 6) // LSB First controls
47 #define SPCR_SPIE (1 << 7) // Serial peripheral interrupt enable.
48 #define SPCR_BITS (0xF << 8) // When bit 2 of this register is 1,
49 // this field controls the number of
51 // 1000 : 8 bits per transfer
52 // 1001 : 9 bits per transfer
53 // 1010 : 10 bits per transfer
54 // 1011 : 11 bits per transfer
55 // 1100 : 12 bits per transfer
56 // 1101 : 13 bits per transfer
57 // 1110 : 14 bits per transfer
58 // 1111 : 15 bits per transfer
59 // 0000 : 16 bits per transfer
62 #define SPSR_ABRT (1 << 3) // Slave abort.
63 #define SPSR_MODF (1 << 4) // Mode fault.
64 #define SPSR_ROVR (1 << 5) // Read overrun.
65 #define SPSR_WCOL (1 << 6) // Write collision.
66 #define SPSR_SPIF (1 << 7) // SPI transfer complete flag.
68 //SPI Interrupt register
69 #define SPINT_IF (1 << 0) // SPI interrupt flag.