embedded/board/arm/ul_usb1/defines/system_def-ha-switch.h

   1 /*******************************************************************
   2   Components for embedded applications builded for
   3   laboratory and medical instruments firmware
   4
   5   system_def.h - common cover for definition of hardware adresses,
   6                  registers, timing and other hardware dependant
   7                  parts of embedded hardware
   8
   9   Copyright (C) 2001 by Pavel Pisa pisa@cmp.felk.cvut.cz
  10             (C) 2002 by PiKRON Ltd. http://www.pikron.com
  11
  12  *******************************************************************/
  13
  14 #ifndef _SYSTEM_DEF_H_
  15 #define _SYSTEM_DEF_H_
  16
  17 #include <types.h>
  18 #include <system_stub.h>
  19 #include <LPC210x.h>
  20 #include <bspbase.h>
  21
  22 #ifndef NULL
  23 #define NULL    0
  24 #endif
  25
  26 #define WITH_SFI_SEL
  27
  28 #define VER_CODE(major,minor,patch) (major*0x10000+minor*0x100+patch)
  29 /* Software version */
  30 #define SW_VER_ID       "UL_HA_SWITCH"
  31 #define SW_VER_MAJOR    0
  32 #define SW_VER_MINOR    2
  33 #define SW_VER_PATCH    0
  34 #define SW_VER_CODE     VER_CODE(SW_VER_MAJOR,SW_VER_MINOR,SW_VER_PATCH)
  35 /* Hardware version */
  36 #define HW_VER_ID       "UL_HA_SWITCH"
  37 #define HW_VER_MAJOR    1
  38 #define HW_VER_MINOR    0
  39 #define HW_VER_PATCH    0
  40 #define HW_VER_CODE     VER_CODE(HW_VER_MAJOR,HW_VER_MINOR,HW_VER_PATCH)
  41 /* Version of mechanical  */
  42 #define MECH_VER_ID     "UL_HA_SWITCH"
  43 #define MECH_VER_MAJOR  0
  44 #define MECH_VER_MINOR  0
  45 #define MECH_VER_PATCH  0
  46 #define MECH_VER_CODE   VER_CODE(MECH_VER_MAJOR,MECH_VER_MINOR,MECH_VER_PATCH)
  47
  48
  49 // PLL setup values are computed within the LPC include file
  50 // It relies upon the following defines
  51 #define FOSC                (14745600)  // Master Oscillator Freq.
  52 #define PLL_MUL             (4)         // PLL Multiplier
  53 #define CCLK                (FOSC * PLL_MUL) // CPU Clock Freq.
  54
  55 // Pheripheral Bus Speed Divider
  56 #define PBSD                1           // MUST BE 1, 2, or 4
  57 #define PCLK                (CCLK / PBSD) // Pheripheal Bus Clock Freq.
  58
  59 #define SYS_TIMER_HZ        1000
  60
  61 #ifndef BIT
  62 #define BIT(n)              (1 << (n))
  63 #endif
  64
  65 // Port Bit Definitions & Macros:    Description - initial conditions
  66 #define TXD0_BIT            BIT(0)      // used by UART0
  67 #define RXD0_BIT            BIT(1)      // used by UART0
  68 #define P0_02_UNUSED_BIT    BIT(2)      // P0.02 unused - low output
  69 #define OUT2_BIT            BIT(3)      // P0.03 unused - low output
  70 #define P0_04_UNUSED_BIT    BIT(4)      // P0.04 unused - low output
  71 #define OUT1_BIT            BIT(5)      // P0.05 unused - low output
  72 #define IR_BIT              BIT(6)      // P0.06 unused - low output
  73 #define SPK_P_BIT           BIT(7)      // P0.07 unused - low output
  74 #define TXD1_BIT            BIT(8)      // used by UART1
  75 #define RXD1_BIT            BIT(9)      // used by UART1
  76 #define RTS1_BIT            BIT(10)     // used by UART1
  77 #define CTS1_BIT            BIT(11)     // used by UART1
  78 #define DSR1_BIT            BIT(12)     // used by UART1
  79 #define LED3_BIT            BIT(13)     // used by LED
  80 #define BOOT_BIT            BIT(14)     // SWITCH
  81 #define IN1_BIT             BIT(15)     // P0.15 unused - low output
  82 #define IN2_BIT             BIT(16)     // P0.16 unused - low output
  83 #define P0_17_UNUSED_BIT    BIT(17)     // P0.17 unused - low output
  84 #define P0_18_UNUSED_BIT    BIT(18)     // P0.18 unused - low output
  85 #define LED4_BIT            BIT(19)     // used by LED
  86 #define LED1_BIT            BIT(20)     // used by LED
  87 #define LED2_BIT            BIT(21)     // used by LED
  88 #define USENSE_BIT          BIT(22)     // P0.22 unused - low output
  89 #define SW1_BIT             BIT(23)     // P0.23 unused - low output
  90 #define SW3_BIT             BIT(24)     // P0.24 unused - low output
  91 #define SW2_BIT             BIT(25)     // P0.25 unused - low output
  92 #define SW4_BIT             BIT(26)     // P0.26 unused - low output
  93 #define P0_27_UNUSED_BIT    BIT(27)     // P0.27 unused - low output
  94 #define P0_28_UNUSED_BIT    BIT(28)     // P0.28 unused - low output
  95 #define P0_29_UNUSED_BIT    BIT(29)     // P0.29 unused - low output
  96 #define LED5_BIT            BIT(30)     // P0.30 unused - low output
  97 #define P0_31_UNUSED_BIT    BIT(31)     // P0.31 unused - low output
  98
  99
 100 #define P0IO_INPUT_BITS      (uint32_t) ( \
 101                                          BOOT_BIT | \
 102                                          IR_BIT | \
 103                                          IN1_BIT | \
 104                                          IN2_BIT | \
 105                                          SW1_BIT | \
 106                                          SW2_BIT | \
 107                                          SW3_BIT | \
 108                                          SW4_BIT | \
 109                                          UNSENSE_BIT | \
 110                                          0 )
 111
 112 #define P0IO_ZERO_BITS       (uint32_t) ( \
 113                                          SPK_P_BIT | \
 114                                          OUT1_BIT | \
 115                                          OUT2_BIT | \
 116                                          LED1_BIT | \
 117                                          LED2_BIT | \
 118                                          LED3_BIT | \
 119                                          LED4_BIT | \
 120                                          LED5_BIT | \
 121                                          P0_02_UNUSED_BIT | \
 122                                          P0_04_UNUSED_BIT | \
 123                                          P0_17_UNUSED_BIT | \
 124                                          P0_18_UNUSED_BIT | \
 125                                          P0_27_UNUSED_BIT | \
 126                                          P0_28_UNUSED_BIT | \
 127                                          P0_29_UNUSED_BIT | \
 128                                          P0_31_UNUSED_BIT | \
 129                                          0 )
 130
 131
 132
 133 #define P0IO_ONE_BITS        (uint32_t) ( \
 134                                          BOOT_BIT | \
 135                                          0 )
 136
 137 #define P0IO_OUTPUT_BITS     (uint32_t) ( \
 138                                          P0IO_ZERO_BITS | \
 139                                          P0IO_ONE_BITS )
 140
 141
 142 /***************************************************************************/
 143 /* io functions */
 144 #define LED_GP                  LED1_BIT  /* GENREAL PURPOSE LED */
 145 #define LED_ERR                 LED2_BIT
 146
 147 /***************************************************************************/
 148 /* io functions */
 149 #define IN_PORT                 IO0
 150 #define OUT_PORT                IO0
 151 #define LED_PORT                IO0
 152
 153 #define CREATE_PORT_NAME_PIN(port) port##PIN
 154 #define CREATE_PORT_NAME_CLR(port) port##CLR
 155 #define CREATE_PORT_NAME_SET(port) port##SET
 156
 157 #define GET_IN_PIN(port,in)     ((CREATE_PORT_NAME_PIN(port) & in)?1:0)
 158 #define SET_OUT_PIN(port,out)   (CREATE_PORT_NAME_SET(port)=out)
 159 #define CLR_OUT_PIN(port,out)   (CREATE_PORT_NAME_CLR(port)=out)
 160
 161 /***************************************************************************/
 162 /* watchdog */
 163 //#define WATCHDOG_ENABLED
 164 #define WATCHDOG_TIMEOUT_MS     1000
 165
 166 /***************************************************************************/
 167 /* uLan configuration */
 168 #ifdef UL_LOG_ENABLE
 169   #undef UL_LOG_ENABLE
 170 #endif
 171
 172 #ifdef ULD_DEFAULT_BUFFER_SIZE
 173   #undef ULD_DEFAULT_BUFFER_SIZE
 174   #define ULD_DEFAULT_BUFFER_SIZE 0x0400
 175 #endif
 176
 177 #define UL_DRV_SYSLESS_PORT 0xE0010000
 178 #define UL_DRV_SYSLESS_BAUD 19200
 179 #define UL_DRV_SYSLESS_IRQ HAL_INTERRUPT_UART1
 180 #define UL_DRV_SYSLESS_MY_ADR_DEFAULT 1
 181
 182
 183 #define watchdog_feed lpc_watchdog_feed
 184 #define kvpb_erase lpcisp_kvpb_erase
 185 #define kvpb_copy lpcisp_kvpb_copy
 186 #define kvpb_flush lpcisp_kvpb_flush
 187 #define KVPB_DEFAULT_FLAGS KVPB_DESC_DOUBLE|KVPB_DESC_CHUNKWO
 188
 189 #define HAL_ARM_LPC2XXX_EXTINT_ERRATA
 190
 191 #endif /* _SYSTEM_DEF_H_ */