2 * Linux CAN-bus device driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * Changed for PeliCan mode SJA1000 by Tomasz Motylewski (BFAD GmbH)
6 * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
7 * email:pisa@cmp.felk.cvut.cz
8 * This software is released under the GPL-License.
9 * Version lincan-0.3 17 Jun 2004
12 #include "../include/can.h"
13 #include "../include/can_sysdep.h"
14 #include "../include/main.h"
15 #include "../include/sja1000p.h"
18 * sja1000p_enable_configuration - enable chip configuration mode
19 * @chip: pointer to chip state structure
21 int sja1000p_enable_configuration(struct canchip_t *chip)
24 enum sja1000_PeliCAN_MOD flags;
26 can_disable_irq(chip->chip_irq);
28 flags=can_read_reg(chip,SJAMOD);
30 while ((!(flags & sjaMOD_RM)) && (i<=10)) {
31 can_write_reg(chip, sjaMOD_RM, SJAMOD);
32 // TODO: configurable sjaMOD_AFM (32/16 bit acceptance filter)
33 // config sjaMOD_LOM (listen only)
36 flags=can_read_reg(chip, SJAMOD);
39 CANMSG("Reset error\n");
40 can_enable_irq(chip->chip_irq);
48 * sja1000p_disable_configuration - disable chip configuration mode
49 * @chip: pointer to chip state structure
51 int sja1000p_disable_configuration(struct canchip_t *chip)
54 enum sja1000_PeliCAN_MOD flags;
56 flags=can_read_reg(chip,SJAMOD);
58 while ( (flags & sjaMOD_RM) && (i<=50) ) {
59 // could be as long as 11*128 bit times after buss-off
60 can_write_reg(chip, 0, SJAMOD);
61 // TODO: configurable sjaMOD_AFM (32/16 bit acceptance filter)
62 // config sjaMOD_LOM (listen only)
65 flags=can_read_reg(chip, SJAMOD);
68 CANMSG("Error leaving reset status\n");
72 can_enable_irq(chip->chip_irq);
78 * sja1000p_chip_config: - can chip configuration
79 * @chip: pointer to chip state structure
81 * This function configures chip and prepares it for message
82 * transmission and reception. The function resets chip,
83 * resets mask for acceptance of all messages by call to
84 * sja1000p_extended_mask() function and then
85 * computes and sets baudrate with use of function sja1000p_baud_rate().
86 * Return Value: negative value reports error.
87 * File: src/sja1000p.c
89 int sja1000p_chip_config(struct canchip_t *chip)
94 if (sja1000p_enable_configuration(chip))
97 /* Set mode, clock out, comparator */
98 can_write_reg(chip,sjaCDR_PELICAN|chip->sja_cdr_reg,SJACDR);
100 /* Ensure, that interrupts are disabled even on the chip level now */
101 can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER);
103 /* Set driver output configuration */
104 can_write_reg(chip,chip->sja_ocr_reg,SJAOCR);
106 /* Simple check for chip presence */
107 for (i=0, n=0x5a; i<8; i++, n+=0xf) {
108 can_write_reg(chip,n,SJAACR0+i);
110 for (i=0, n=0x5a; i<8; i++, n+=0xf) {
111 r = n^can_read_reg(chip,SJAACR0+i);
113 CANMSG("sja1000p_chip_config: chip connection broken,"
114 " readback differ 0x%02x\n", r);
120 if (sja1000p_extended_mask(chip,0x00000000, 0xffffffff))
124 chip->baudrate=1000000;
125 if (sja1000p_baud_rate(chip,chip->baudrate,chip->clock,0,75,0))
128 /* Enable hardware interrupts */
129 can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER);
131 sja1000p_disable_configuration(chip);
137 * sja1000p_extended_mask: - setup of extended mask for message filtering
138 * @chip: pointer to chip state structure
139 * @code: can message acceptance code
140 * @mask: can message acceptance mask
142 * Return Value: negative value reports error.
143 * File: src/sja1000p.c
145 int sja1000p_extended_mask(struct canchip_t *chip, unsigned long code, unsigned long mask)
149 if (sja1000p_enable_configuration(chip))
152 // LSB to +3, MSB to +0
153 for(i=SJA_PeliCAN_AC_LEN; --i>=0;) {
154 can_write_reg(chip,code&0xff,SJAACR0+i);
155 can_write_reg(chip,mask&0xff,SJAAMR0+i);
160 DEBUGMSG("Setting acceptance code to 0x%lx\n",(unsigned long)code);
161 DEBUGMSG("Setting acceptance mask to 0x%lx\n",(unsigned long)mask);
163 sja1000p_disable_configuration(chip);
169 * sja1000p_baud_rate: - set communication parameters.
170 * @chip: pointer to chip state structure
171 * @rate: baud rate in Hz
172 * @clock: frequency of sja1000 clock in Hz (ISA osc is 14318000)
173 * @sjw: synchronization jump width (0-3) prescaled clock cycles
174 * @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio
175 * @flags: fields %BTR1_SAM, %OCMODE, %OCPOL, %OCTP, %OCTN, %CLK_OFF, %CBP
177 * Return Value: negative value reports error.
178 * File: src/sja1000p.c
180 int sja1000p_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
181 int sampl_pt, int flags)
183 int best_error = 1000000000, error;
184 int best_tseg=0, best_brp=0, best_rate=0, brp=0;
185 int tseg=0, tseg1=0, tseg2=0;
187 if (sja1000p_enable_configuration(chip))
192 /* tseg even = round down, odd = round up */
193 for (tseg=(0+0+2)*2; tseg<=(sjaMAX_TSEG2+sjaMAX_TSEG1+2)*2+1; tseg++) {
194 brp = clock/((1+tseg/2)*rate)+tseg%2;
195 if (brp == 0 || brp > 64)
197 error = rate - clock/(brp*(1+tseg/2));
200 if (error <= best_error) {
204 best_rate = clock/(brp*(1+tseg/2));
207 if (best_error && (rate/best_error < 10)) {
208 CANMSG("baud rate %d is not possible with %d Hz clock\n",
210 CANMSG("%d bps. brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d\n",
211 best_rate, best_brp, best_tseg, tseg1, tseg2);
214 tseg2 = best_tseg-(sampl_pt*(best_tseg+1))/100;
217 if (tseg2 > sjaMAX_TSEG2)
218 tseg2 = sjaMAX_TSEG2;
219 tseg1 = best_tseg-tseg2-2;
220 if (tseg1>sjaMAX_TSEG1) {
221 tseg1 = sjaMAX_TSEG1;
222 tseg2 = best_tseg-tseg1-2;
225 DEBUGMSG("Setting %d bps.\n", best_rate);
226 DEBUGMSG("brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d, sampl_pt=%d\n",
227 best_brp, best_tseg, tseg1, tseg2,
228 (100*(best_tseg-tseg2)/(best_tseg+1)));
231 can_write_reg(chip, sjw<<6 | best_brp, SJABTR0);
232 can_write_reg(chip, ((flags & BTR1_SAM) != 0)<<7 | (tseg2<<4)
235 sja1000p_disable_configuration(chip);
241 * sja1000p_read: - reads and distributes one or more received messages
242 * @chip: pointer to chip state structure
243 * @obj: pinter to CAN message queue information
245 * File: src/sja1000p.c
247 void sja1000p_read(struct canchip_t *chip, struct msgobj_t *obj) {
248 int i, flags, len, datastart;
250 flags = can_read_reg(chip,SJAFRM);
251 if(flags&sjaFRM_FF) {
253 (can_read_reg(chip,SJAID0)<<21) +
254 (can_read_reg(chip,SJAID1)<<13) +
255 (can_read_reg(chip,SJAID2)<<5) +
256 (can_read_reg(chip,SJAID3)>>3);
260 (can_read_reg(chip,SJAID0)<<3) +
261 (can_read_reg(chip,SJAID1)>>5);
265 ((flags & sjaFRM_RTR) ? MSG_RTR : 0) |
266 ((flags & sjaFRM_FF) ? MSG_EXT : 0);
267 len = flags & sjaFRM_DLC_M;
268 obj->rx_msg.length = len;
269 if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
270 for(i=0; i< len; i++) {
271 obj->rx_msg.data[i]=can_read_reg(chip,datastart+i);
274 /* fill CAN message timestamp */
275 can_filltimestamp(&obj->rx_msg.timestamp);
277 canque_filter_msg2edges(obj->qends, &obj->rx_msg);
279 can_write_reg(chip, sjaCMR_RRB, SJACMR);
281 } while (can_read_reg(chip, SJASR) & sjaSR_RBS);
285 * sja1000p_pre_read_config: - prepares message object for message reception
286 * @chip: pointer to chip state structure
287 * @obj: pointer to message object state structure
289 * Return Value: negative value reports error.
290 * Positive value indicates immediate reception of message.
291 * File: src/sja1000p.c
293 int sja1000p_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj)
296 status=can_read_reg(chip,SJASR);
298 if(status & sjaSR_BS) {
299 /* Try to recover from error condition */
300 DEBUGMSG("sja1000p_pre_read_config bus-off recover 0x%x\n",status);
301 sja1000p_enable_configuration(chip);
302 can_write_reg(chip, 0, SJARXERR);
303 can_write_reg(chip, 0, SJATXERR1);
304 can_read_reg(chip, SJAECC);
305 sja1000p_disable_configuration(chip);
308 if (!(status&sjaSR_RBS)) {
312 can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER); //disable interrupts for a moment
313 sja1000p_read(chip, obj);
314 can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER); //enable interrupts
318 #define MAX_TRANSMIT_WAIT_LOOPS 10
320 * sja1000p_pre_write_config: - prepares message object for message transmission
321 * @chip: pointer to chip state structure
322 * @obj: pointer to message object state structure
323 * @msg: pointer to CAN message
325 * This function prepares selected message object for future initiation
326 * of message transmission by sja1000p_send_msg() function.
327 * The CAN message data and message ID are transfered from @msg slot
328 * into chip buffer in this function.
329 * Return Value: negative value reports error.
330 * File: src/sja1000p.c
332 int sja1000p_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
333 struct canmsg_t *msg)
340 /* Wait until Transmit Buffer Status is released */
341 while ( !((status=can_read_reg(chip, SJASR)) & sjaSR_TBS) &&
342 i++<MAX_TRANSMIT_WAIT_LOOPS) {
346 if(status & sjaSR_BS) {
347 /* Try to recover from error condition */
348 DEBUGMSG("sja1000p_pre_write_config bus-off recover 0x%x\n",status);
349 sja1000p_enable_configuration(chip);
350 can_write_reg(chip, 0, SJARXERR);
351 can_write_reg(chip, 0, SJATXERR1);
352 can_read_reg(chip, SJAECC);
353 sja1000p_disable_configuration(chip);
355 if (!(can_read_reg(chip, SJASR) & sjaSR_TBS)) {
356 CANMSG("Transmit timed out, cancelling\n");
357 // here we should check if there is no write/select waiting for this
358 // transmit. If so, set error ret and wake up.
359 // CHECKME: if we do not disable sjaIER_TIE (TX IRQ) here we get interrupt
361 can_write_reg(chip, sjaCMR_AT, SJACMR);
363 while ( !(can_read_reg(chip, SJASR) & sjaSR_TBS) &&
364 i++<MAX_TRANSMIT_WAIT_LOOPS) {
367 if (!(can_read_reg(chip, SJASR) & sjaSR_TBS)) {
368 CANMSG("Could not cancel, please reset\n");
373 if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
374 /* len &= sjaFRM_DLC_M; ensured by above condition already */
375 can_write_reg(chip, ((msg->flags&MSG_EXT)?sjaFRM_FF:0) |
376 ((msg->flags & MSG_RTR) ? sjaFRM_RTR : 0) | len, SJAFRM);
377 if(msg->flags&MSG_EXT) {
379 can_write_reg(chip, id & 0xff, SJAID3);
381 can_write_reg(chip, id & 0xff, SJAID2);
383 can_write_reg(chip, id & 0xff, SJAID1);
385 can_write_reg(chip, id, SJAID0);
386 for(i=0; i < len; i++) {
387 can_write_reg(chip, msg->data[i], SJADATE+i);
391 can_write_reg(chip, (id >> 8) & 0xff, SJAID0);
392 can_write_reg(chip, id & 0xff, SJAID1);
393 for(i=0; i < len; i++) {
394 can_write_reg(chip, msg->data[i], SJADATS+i);
401 * sja1000p_send_msg: - initiate message transmission
402 * @chip: pointer to chip state structure
403 * @obj: pointer to message object state structure
404 * @msg: pointer to CAN message
406 * This function is called after sja1000p_pre_write_config() function,
407 * which prepares data in chip buffer.
408 * Return Value: negative value reports error.
409 * File: src/sja1000p.c
411 int sja1000p_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
412 struct canmsg_t *msg)
414 can_write_reg(chip, sjaCMR_TR, SJACMR);
420 * sja1000p_check_tx_stat: - checks state of transmission engine
421 * @chip: pointer to chip state structure
423 * Return Value: negative value reports error.
424 * Positive return value indicates transmission under way status.
425 * Zero value indicates finishing of all issued transmission requests.
426 * File: src/sja1000p.c
428 int sja1000p_check_tx_stat(struct canchip_t *chip)
430 if (can_read_reg(chip,SJASR) & sjaSR_TCS)
437 * sja1000p_set_btregs: - configures bitrate registers
438 * @chip: pointer to chip state structure
439 * @btr0: bitrate register 0
440 * @btr1: bitrate register 1
442 * Return Value: negative value reports error.
443 * File: src/sja1000p.c
445 int sja1000p_set_btregs(struct canchip_t *chip, unsigned short btr0,
448 if (sja1000p_enable_configuration(chip))
451 can_write_reg(chip, btr0, SJABTR0);
452 can_write_reg(chip, btr1, SJABTR1);
454 sja1000p_disable_configuration(chip);
460 * sja1000p_start_chip: - starts chip message processing
461 * @chip: pointer to chip state structure
463 * Return Value: negative value reports error.
464 * File: src/sja1000p.c
466 int sja1000p_start_chip(struct canchip_t *chip)
468 enum sja1000_PeliCAN_MOD flags;
470 flags = can_read_reg(chip, SJAMOD) & (sjaMOD_LOM|sjaMOD_STM|sjaMOD_AFM|sjaMOD_SM);
471 can_write_reg(chip, flags, SJAMOD);
477 * sja1000p_stop_chip: - stops chip message processing
478 * @chip: pointer to chip state structure
480 * Return Value: negative value reports error.
481 * File: src/sja1000p.c
483 int sja1000p_stop_chip(struct canchip_t *chip)
485 enum sja1000_PeliCAN_MOD flags;
487 flags = can_read_reg(chip, SJAMOD) & (sjaMOD_LOM|sjaMOD_STM|sjaMOD_AFM|sjaMOD_SM);
488 can_write_reg(chip, flags|sjaMOD_RM, SJAMOD);
494 * sja1000p_attach_to_chip: - attaches to the chip, setups registers and state
495 * @chip: pointer to chip state structure
497 * Return Value: negative value reports error.
498 * File: src/sja1000p.c
500 int sja1000p_attach_to_chip(struct canchip_t *chip)
506 * sja1000p_release_chip: - called before chip structure removal if %CHIP_ATTACHED is set
507 * @chip: pointer to chip state structure
509 * Return Value: negative value reports error.
510 * File: src/sja1000p.c
512 int sja1000p_release_chip(struct canchip_t *chip)
514 sja1000p_stop_chip(chip);
515 can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER);
521 * sja1000p_remote_request: - configures message object and asks for RTR message
522 * @chip: pointer to chip state structure
523 * @obj: pointer to message object structure
525 * Return Value: negative value reports error.
526 * File: src/sja1000p.c
528 int sja1000p_remote_request(struct canchip_t *chip, struct msgobj_t *obj)
530 CANMSG("sja1000p_remote_request not implemented\n");
535 * sja1000p_standard_mask: - setup of mask for message filtering
536 * @chip: pointer to chip state structure
537 * @code: can message acceptance code
538 * @mask: can message acceptance mask
540 * Return Value: negative value reports error.
541 * File: src/sja1000p.c
543 int sja1000p_standard_mask(struct canchip_t *chip, unsigned short code,
546 CANMSG("sja1000p_standard_mask not implemented\n");
551 * sja1000p_clear_objects: - clears state of all message object residing in chip
552 * @chip: pointer to chip state structure
554 * Return Value: negative value reports error.
555 * File: src/sja1000p.c
557 int sja1000p_clear_objects(struct canchip_t *chip)
559 CANMSG("sja1000p_clear_objects not implemented\n");
564 * sja1000p_config_irqs: - tunes chip hardware interrupt delivery
565 * @chip: pointer to chip state structure
566 * @irqs: requested chip IRQ configuration
568 * Return Value: negative value reports error.
569 * File: src/sja1000p.c
571 int sja1000p_config_irqs(struct canchip_t *chip, short irqs)
573 CANMSG("sja1000p_config_irqs not implemented\n");
578 * sja1000p_irq_write_handler: - part of ISR code responsible for transmit events
579 * @chip: pointer to chip state structure
580 * @obj: pointer to attached queue description
582 * The main purpose of this function is to read message from attached queues
583 * and transfer message contents into CAN controller chip.
584 * This subroutine is called by
585 * sja1000p_irq_write_handler() for transmit events.
586 * File: src/sja1000p.c
588 void sja1000p_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
593 /* Do local transmitted message distribution if enabled */
595 /* fill CAN message timestamp */
596 can_filltimestamp(&obj->tx_slot->msg.timestamp);
598 obj->tx_slot->msg.flags |= MSG_LOCAL;
599 canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
601 /* Free transmitted slot */
602 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
606 can_msgobj_clear_fl(obj,TX_PENDING);
607 cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
610 can_msgobj_set_fl(obj,TX_PENDING);
612 if (chip->chipspecops->pre_write_config(chip, obj, &obj->tx_slot->msg)) {
614 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_PREP);
615 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
619 if (chip->chipspecops->send_msg(chip, obj, &obj->tx_slot->msg)) {
621 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_SEND);
622 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
632 * sja1000p_irq_handler: - interrupt service routine
633 * @irq: interrupt vector number, this value is system specific
634 * @chip: pointer to chip state structure
636 * Interrupt handler is activated when state of CAN controller chip changes,
637 * there is message to be read or there is more space for new messages or
638 * error occurs. The receive events results in reading of the message from
639 * CAN controller chip and distribution of message through attached
641 * File: src/sja1000p.c
643 int sja1000p_irq_handler(int irq, struct canchip_t *chip)
645 int irq_register, status, error_code;
646 struct msgobj_t *obj=chip->msgobj[0];
647 int loop_cnt=CHIP_MAX_IRQLOOP;
649 irq_register=can_read_reg(chip,SJAIR);
650 // DEBUGMSG("sja1000_irq_handler: SJAIR:%02x\n",irq_register);
651 // DEBUGMSG("sja1000_irq_handler: SJASR:%02x\n",
652 // can_read_reg(chip,SJASR));
654 if ((irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI)) == 0)
655 return CANCHIP_IRQ_NONE;
657 if(!(chip->flags&CHIP_CONFIGURED)) {
658 CANMSG("sja1000p_irq_handler: called for non-configured device, irq_register 0x%02x\n", irq_register);
659 return CANCHIP_IRQ_NONE;
662 status=can_read_reg(chip,SJASR);
667 CANMSG("sja1000p_irq_handler IRQ %d stuck\n",irq);
668 return CANCHIP_IRQ_STUCK;
671 /* (irq_register & sjaIR_RI) */
672 /* old variant using SJAIR, collides with intended use with irq_accept */
673 if (status & sjaSR_RBS) {
674 DEBUGMSG("sja1000_irq_handler: RI or RBS\n");
675 sja1000p_read(chip,obj);
679 /* (irq_register & sjaIR_TI) */
680 /* old variant using SJAIR, collides with intended use with irq_accept */
681 if ((status & sjaSR_TBS) && can_msgobj_test_fl(obj,TX_PENDING)) {
682 DEBUGMSG("sja1000_irq_handler: TI or TX_PENDING and TBS\n");
684 can_msgobj_set_fl(obj,TX_REQUEST);
685 while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
686 can_msgobj_clear_fl(obj,TX_REQUEST);
688 if (can_read_reg(chip, SJASR) & sjaSR_TBS)
689 sja1000p_irq_write_handler(chip, obj);
691 can_msgobj_clear_fl(obj,TX_LOCK);
692 if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
693 DEBUGMSG("TX looping in sja1000_irq_handler\n");
696 if ((irq_register & (sjaIR_EI|sjaIR_BEI|sjaIR_EPI|sjaIR_DOI)) != 0) {
697 // Some error happened
698 error_code=can_read_reg(chip,SJAECC);
699 CANMSG("Error: status register: 0x%x irq_register: 0x%02x error: 0x%02x\n",
700 status, irq_register, error_code);
701 // FIXME: chip should be brought to usable state. Transmission cancelled if in progress.
702 // Reset flag set to 0 if chip is already off the bus. Full state report
705 if(error_code == 0xd9) {
707 /* no such device or address - no ACK received */
709 if(obj->tx_retry_cnt++>MAX_RETR) {
710 can_write_reg(chip, sjaCMR_AT, SJACMR); // cancel any transmition
711 obj->tx_retry_cnt = 0;
713 if(status&sjaSR_BS) {
714 CANMSG("bus-off, resetting sja1000p\n");
715 can_write_reg(chip, 0, SJAMOD);
719 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_BUS);
720 /*canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
728 irq_register=can_read_reg(chip,SJAIR);
730 status=can_read_reg(chip,SJASR);
732 } while((irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI)) ||
733 ((status & sjaSR_TBS) && can_msgobj_test_fl(obj,TX_PENDING)) ||
734 (status & sjaSR_RBS));
736 return CANCHIP_IRQ_HANDLED;
740 * sja1000p_wakeup_tx: - wakeups TX processing
741 * @chip: pointer to chip state structure
742 * @obj: pointer to message object structure
744 * Function is responsible for initiating message transmition.
745 * It is responsible for clearing of object TX_REQUEST flag
747 * Return Value: negative value reports error.
748 * File: src/sja1000p.c
750 int sja1000p_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
753 can_preempt_disable();
755 can_msgobj_set_fl(obj,TX_PENDING);
756 can_msgobj_set_fl(obj,TX_REQUEST);
757 while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
758 can_msgobj_clear_fl(obj,TX_REQUEST);
760 if (can_read_reg(chip, SJASR) & sjaSR_TBS){
762 sja1000p_irq_write_handler(chip, obj);
765 can_msgobj_clear_fl(obj,TX_LOCK);
766 if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
767 DEBUGMSG("TX looping in sja1000p_wakeup_tx\n");
770 can_preempt_enable();
774 int sja1000p_register(struct chipspecops_t *chipspecops)
776 CANMSG("initializing sja1000p chip operations\n");
777 chipspecops->chip_config=sja1000p_chip_config;
778 chipspecops->baud_rate=sja1000p_baud_rate;
779 chipspecops->standard_mask=sja1000p_standard_mask;
780 chipspecops->extended_mask=sja1000p_extended_mask;
781 chipspecops->message15_mask=sja1000p_extended_mask;
782 chipspecops->clear_objects=sja1000p_clear_objects;
783 chipspecops->config_irqs=sja1000p_config_irqs;
784 chipspecops->pre_read_config=sja1000p_pre_read_config;
785 chipspecops->pre_write_config=sja1000p_pre_write_config;
786 chipspecops->send_msg=sja1000p_send_msg;
787 chipspecops->check_tx_stat=sja1000p_check_tx_stat;
788 chipspecops->wakeup_tx=sja1000p_wakeup_tx;
789 chipspecops->remote_request=sja1000p_remote_request;
790 chipspecops->enable_configuration=sja1000p_enable_configuration;
791 chipspecops->disable_configuration=sja1000p_disable_configuration;
792 chipspecops->attach_to_chip=sja1000p_attach_to_chip;
793 chipspecops->release_chip=sja1000p_release_chip;
794 chipspecops->set_btregs=sja1000p_set_btregs;
795 chipspecops->start_chip=sja1000p_start_chip;
796 chipspecops->stop_chip=sja1000p_stop_chip;
797 chipspecops->irq_handler=sja1000p_irq_handler;
798 chipspecops->irq_accept=NULL;
803 * sja1000p_fill_chipspecops - fills chip specific operations
804 * @chip: pointer to chip representation structure
806 * The function fills chip specific operations for sja1000 (PeliCAN) chip.
808 * Return Value: returns negative number in the case of fail
810 int sja1000p_fill_chipspecops(struct canchip_t *chip)
812 chip->chip_type="sja1000p";
814 sja1000p_register(chip->chipspecops);