5 #include "hal_machperiph.h"
7 #include "system_def.h"
10 #include "can/canmsg.h"
17 // CAN1, CAN2 and CAN Acceptance filter base addresses
18 #define CAN1_REGS_BASE 0x40044000UL
19 #define CAN2_REGS_BASE 0x40048000UL
20 #define CANAF_REGS_BASE 0x4003C000UL
22 // offset of CAN registers
23 #define CAN_MOD_o 0x0000
24 #define CAN_CMR_o 0x0004
25 #define CAN_GSR_o 0x0008
26 #define CAN_ICR_o 0x000C
27 #define CAN_IER_o 0x0010
28 #define CAN_BTR_o 0x0014
29 #define CAN_EWL_o 0x0018
30 #define CAN_SR_o 0x001C
31 #define CAN_RFS_o 0x0020
32 #define CAN_RID_o 0x0024
33 #define CAN_RDA_o 0x0028
34 #define CAN_RDB_o 0x002C
35 #define CAN_TFI1_o 0x0030
36 #define CAN_TID1_o 0x0034
37 #define CAN_TDA1_o 0x0038
38 #define CAN_TDB1_o 0x003C
39 #define CAN_TFI2_o 0x0040
40 #define CAN_TID2_o 0x0044
41 #define CAN_TDA2_o 0x0048
42 #define CAN_TDB2_o 0x004C
43 #define CAN_TFI3_o 0x0050
44 #define CAN_TID3_o 0x0054
45 #define CAN_TDA3_o 0x0058
46 #define CAN_TDB3_o 0x005C
48 // offset of CAN Acceptance filter registers
49 #define CANAF_AFMR_o 0x0000
50 #define CANAF_SFF_sa_o 0x0004
51 #define CANAF_SFF_GRP_sa_o 0x0008
52 #define CANAF_EFF_sa_o 0x000C
53 #define CANAF_EFF_GRP_sa_o 0x0010
54 #define CANAF_ENDofTable_o 0x0014
55 #define CANAF_LUTerrAd_o 0x0018
56 #define CANAF_LUTerr_o 0x001C
58 //----------------------------------
60 #define CAN1MOD (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_MOD_o))
61 #define CAN1CMR (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_CMR_o))
62 #define CAN1GSR (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_GSR_o))
63 #define CAN1ICR (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_ICR_o))
64 #define CAN1IER (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_IER_o))
65 #define CAN1BTR (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_BTR_o))
66 #define CAN1EWL (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_EWL_o))
67 #define CAN1SR (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_SR_o))
68 #define CAN1RFS (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_RFS_o))
69 #define CAN1RID (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_RID_o))
70 #define CAN1RDA (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_RDA_o))
71 #define CAN1RDB (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_RDB_o))
72 #define CAN1TFI1 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TFI1_o))
73 #define CAN1TID1 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TID1_o))
74 #define CAN1TDA1 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDA1_o))
75 #define CAN1TDB1 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDB1_o))
76 #define CAN1TFI2 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TFI2_o))
77 #define CAN1TID2 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TID2_o))
78 #define CAN1TDA2 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDA2_o))
79 #define CAN1TDB2 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDB2_o))
80 #define CAN1TFI3 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TFI3_o))
81 #define CAN1TID3 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TID3_o))
82 #define CAN1TDA3 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDA3_o))
83 #define CAN1TDB3 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDB3_o))
87 #define CANAF_AFMR (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_AFMR_o))
88 #define CANAF_SFF_sa (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_SFF_sa_o))
89 #define CANAF_SFF_GRP_sa (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_SFF_GRP_sa_o))
90 #define CANAF_EFF_sa (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_EFF_sa_o))
91 #define CANAF_EFF_GRP_sa (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_EFF_GRP_sa_o))
92 #define CANAF_ENDofTable (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_ENDofTable_o))
93 #define CANAF_LUTerrAd (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_LUTerrAd_o))
94 #define CANAF_LUTerr (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_LUTerr_o))
96 //----------------------------------
98 //CAN Global Status Register
99 #define CAN_GSR_BS (1<<7)
101 //CAN Interrupt and Capture Register bits
102 #define CAN_ICR_RI (1<<0)
103 #define CAN_ICR_TI1 (1<<1)
104 #define CAN_ICR_DOI (1<<3)
105 #define CAN_ICR_IDI (1<<8)
107 //CAN Status Register bits
108 #define CAN_SR_RBS (1<<0)
109 #define CAN_SR_DOS (1<<1)
110 #define CAN_SR_TBS1 (1<<2)
111 #define CAN_SR_TCS1 (1<<3)
113 //CAN Command Register bits
114 #define CAN_CMR_TR (1<<0)
115 #define CAN_CMR_AT (1<<1)
116 #define CAN_CMR_RRB (1<<2)
117 #define CAN_CMR_CDO (1<<3)
118 #define CAN_CMR_STB1 (1<<5)
120 //CAN Transmit Frame Information register 1 bits
121 #define CAN_TFI1_RTR (1<<30)
122 #define CAN_TFI1_EXT (1<<31)
124 //CAN Receive Frame Status register
125 #define CAN_RFS_RTR (1<<30)
126 #define CAN_RFS_EXT (1<<31)
128 //CAN Interrupt Enable Register bits
129 #define CAN_IER_RIE (1<<0)
130 #define CAN_IER_TIE1 (1<<1)
131 #define CAN_IER_DOIE (1<<3)
132 #define CAN_IER_IDIE (1<<8)
135 //----------------------------------
138 #define PCCAN1 (1<<13) // CAN Controller 1 power/clock control bit.
139 #define PCCAN2 (1<<14) // CAN Controller 2 power/clock control bit.
141 #define PCLK_CAN1_MASK ((1<<27)|(1<<26))
142 #define PCLK_CAN2_MASK ((1<<29)|(1<<28))
143 #define PCLK_ACF_MASK ((1<<31)|(1<<30))
145 #define CAN1_RX_MASK ((1<<1)|(1<<0))
146 #define CAN1_TX_MASK ((1<<3)|(1<<2))
148 // CAN1_RX_BIT a CAN1_TX_BIT jiz definovany v system_def.h
150 //----------------------------------
152 #define MAX_TRANSMIT_WAIT_LOOPS 20
154 void CAN_init(struct canchip_t *chip);
155 void CAN_send(struct canchip_t *chip, canmsg_t* msg);
156 void CAN_recv(struct canchip_t *chip, canmsg_t* msg);
160 * CAN harware-dependent bit-timing constant
162 * Used for calculating and checking bit-timing parameters
165 struct can_bittiming_const {
166 char name[16]; /* Name of the CAN controller hardware */
167 uint32_t tseg1_min; /* Time segement 1 = prop_seg + phase_seg1 */
169 uint32_t tseg2_min; /* Time segement 2 = phase_seg2 */
171 uint32_t sjw_max; /* Synchronisation jump width */
172 uint32_t brp_min; /* Bit-rate prescaler */
177 struct can_lmc1_chip_data
180 struct can_bittiming_const btc;
184 // board can-lmc1 specific functions:
185 int can_lmc1_register(struct hwspecops_t *hwspecops);
186 int can_lmc1_init_hw_data(struct candevice_t *candev);
187 int can_lmc1_init_chip_data(struct candevice_t *candev, int chipnr);
188 int can_lmc1_init_obj_data(struct canchip_t *chip, int objnr);
189 void can_lmc1_write_register(unsigned data, unsigned long address);
190 unsigned can_lmc1_read_register(unsigned long address);
191 int can_lmc1_request_io(struct candevice_t *candev);
192 int can_lmc1_reset(struct candevice_t *candev);
193 int can_lmc1_program_irq(struct candevice_t *candev);
195 // lpc17xx can chip specific functions:
196 int lpc17xx_chip_config(struct canchip_t *chip);
197 int lpc17xx_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
198 struct canmsg_t *msg);
199 int lpc17xx_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
200 struct canmsg_t *msg);
201 int lpc17xx_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj);
202 int lpc17xx_irq_handler(int irq, struct canchip_t *chip);
203 void lpc17xx_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj);
204 int lpc17xx_fill_chipspecops(struct canchip_t *chip);
205 int lpc17xx_register(struct chipspecops_t *chipspecops);
206 int lpc17xx_attach_to_chip(struct canchip_t *chip);
207 int lpc17xx_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj);
208 void lpc17xx_read(struct canchip_t *chip, struct msgobj_t *obj);
214 #endif // LPC17XX_CAN_H_