2 * Header file for the Linux CAN-bus driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * This software is released under the GPL-License.
5 * Version 0.7 6 Aug 2001
9 #include <linux/version.h>
10 #include <linux/wait.h>
13 #include "./constants.h"
16 #define DEBUGMSG(fmt,args...) printk(KERN_ERR "can.o (debug): " fmt,\
19 #define DEBUGMSG(fmt,args...)
22 #define CANMSG(fmt,args...) printk(KERN_ERR "can.o: " fmt,##args)
25 (MINOR(file->f_dentry->d_inode->i_rdev))
27 #define MSG_OFFSET(object) ((object)*0x10)
29 struct canhardware_t {
31 struct rtr_id *rtr_queue;
33 struct candevice_t *candevice[MAX_HW_CARDS];
38 unsigned long io_addr;
39 unsigned long res_addr;
42 /* Hardware chip configuration. In case of multiple chips *chip
43 * is the first in an array of chip_t structures.
47 struct chip_t *chip[MAX_HW_CHIPS];
49 struct hwspecops_t *hwspecops;
51 struct canhardware_t *hosthardware_p;
57 unsigned long chip_base_addr;
59 int clock; // Chip clock in Hz
61 /* sja_cdr_reg holds hardware specific options for the Clock Divider
62 * register. Options defined in the sja1000.h file:
63 * CDR_CLKOUT_MASK, CDR_CLK_OFF, CDR_RXINPEN, CDR_CBP, CDR_PELICAN
65 * sja_ocr_reg holds hardware specific options for the Output Control
66 * register. Options defined in the sja1000.h file:
67 * OCR_MODE_BIPHASE, OCR_MODE_TEST, OCR_MODE_NORMAL, OCR_MODE_CLOCK,
68 * OCR_TX0_LH, OCR_TX1_ZZ.
70 * int_clk_reg holds hardware specific options for the Clock Out
71 * register. Options defined in the i82527.h file:
72 * iCLK_CD0, iCLK_CD1, iCLK_CD2, iCLK_CD3, iCLK_SL0, iCLK_SL1.
74 * int_bus_reg holds hardware specific options for the Bus Configuration
75 * register. Options defined in the i82527.h file:
76 * iBUS_DR0, iBUS_DR1, iBUS_DT1, iBUS_POL, iBUS_CBY.
78 * int_cpu_reg holds hardware specific options for the CPU Interface
79 * register. Options defined in the i82527.h file:
80 * iCPU_CEN, iCPU_MUX, iCPU_SLP, iCPU_PWD, iCPU_DMC, iCPU_DSC, iCPU_RST.
82 unsigned short sja_cdr_reg; // sja1000 only!
83 unsigned short sja_ocr_reg; // sja1000 only!
84 unsigned short int_cpu_reg; // intel 82527 only!
85 unsigned short int_clk_reg; // intel 82527 only!
86 unsigned short int_bus_reg; // intel 82527 only!
88 struct msgobj_t *msgobj[MAX_MSGOBJS];
90 struct chipspecops_t *chipspecops;
92 struct candevice_t *hostdevice;
96 unsigned long obj_base_addr;
102 struct canfifo_t *fifo;
104 struct chip_t *hostchip;
108 int (*request_io)(unsigned long io_addr);
109 int (*release_io)(unsigned long io_addr);
110 int (*reset)(int card);
111 int (*init_hw_data)(int card);
112 int (*init_chip_data)(int card, int chipnr);
113 int (*init_obj_data)(int chipnr, int objnr);
114 void (*write_register)(unsigned char data,unsigned long address);
115 unsigned (*read_register)(unsigned long address);
116 int (*program_irq)(int card);
119 struct chipspecops_t {
120 int (*chip_config)(struct chip_t *chip);
121 int (*baud_rate)(struct chip_t *chip, int rate, int clock, int sjw,
122 int sampl_pt, int flags);
123 int (*standard_mask)(struct chip_t *chip, unsigned short code,
124 unsigned short mask);
125 int (*extended_mask)(struct chip_t *chip, unsigned long code,
127 int (*message15_mask)(struct chip_t *chip, unsigned long code,
129 int (*clear_objects)(struct chip_t *chip);
130 int (*config_irqs)(struct chip_t *chip, short irqs);
131 int (*pre_read_config)(struct chip_t *chip, struct msgobj_t *obj);
132 int (*pre_write_config)(struct chip_t *chip, struct msgobj_t *obj,
133 struct canmsg_t *msg);
134 int (*send_msg)(struct chip_t *chip, struct msgobj_t *obj,
135 struct canmsg_t *msg);
136 int (*remote_request)(struct chip_t *chip, struct msgobj_t *obj);
137 int (*check_tx_stat)(struct chip_t *chip);
138 int (*enable_configuration)(struct chip_t *chip);
139 int (*disable_configuration)(struct chip_t *chip);
140 int (*set_btregs)(struct chip_t *chip, unsigned short btr0,
141 unsigned short btr1);
142 int (*start_chip)(struct chip_t *chip);
143 int (*stop_chip)(struct chip_t *chip);
144 void (*irq_handler)(int irq, void *dev_id, struct pt_regs *regs);
149 struct mem_addr *next;
152 /* Structure for the drivers main input and output buffers. The readq, writeq
153 * entries are the wait queues for the driver to sleep on in case of blocking
154 * read/write calls. buf_rx_entry and buf_tx_entry are pointers to the input and
155 * output buffers. The buffers are dynamically allocated. The tx_readp,
156 * tx_writep, rx_readp and rx_writep pointers are the various read/write
157 * pointers used when reading or writing the input and output buffers. The
158 * rx/tx_size entries are the dynamically allocated input and output buffer size
159 * The rx/tx_in_progress entries are used to determine whether the device is
160 * already set up for transmission.
162 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,2,19))
164 struct wait_queue *readq, *writeq;
165 struct canmsg_t *buf_tx_entry;
166 struct canmsg_t *buf_rx_entry;
167 struct canmsg_t *tx_readp;
168 struct canmsg_t *rx_writep;
169 struct canmsg_t *tx_writep;
170 struct canmsg_t *rx_readp;
171 int rx_size, tx_size;
172 volatile int rx_in_progress, tx_in_progress;
173 int head, tail; //TEMP!!!
177 struct __wait_queue_head readq;
178 struct __wait_queue_head writeq;
179 struct canmsg_t *buf_tx_entry;
180 struct canmsg_t *buf_rx_entry;
181 struct canmsg_t *tx_readp;
182 struct canmsg_t *rx_writep;
183 struct canmsg_t *tx_writep;
184 struct canmsg_t *rx_readp;
185 int rx_size, tx_size;
186 volatile int rx_in_progress, tx_in_progress;
187 int head, tail; //TEMP!!!
191 /* Structure for the RTR queue */
194 struct canmsg_t *rtr_message;
195 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,2,19))
196 struct wait_queue *rtr_wq;
198 struct __wait_queue_head rtr_wq;
204 extern int minor[MAX_TOT_CHIPS];
207 extern char *hw[MAX_HW_CARDS];
208 extern int irq[MAX_IRQ];
209 extern unsigned long io[MAX_HW_CARDS];
211 extern struct canhardware_t *hardware_p;
212 extern struct candevice_t *candevices_p[MAX_HW_CARDS];
213 extern struct chip_t *chips_p[MAX_TOT_CHIPS];
214 extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
216 extern struct mem_addr *mem_head;
218 /* Inline function to write to the hardware registers. The argument address is
219 * relative to the memory map of the chip and not the absolute memory address.
221 extern inline void can_write_reg(struct chip_t *chip, unsigned char data, unsigned short address)
223 unsigned short segment_number;
224 unsigned long address_to_write;
226 address_to_write = chip->chip_base_addr+address;
228 if ( (chip->flags & SEGMENTED) != 0) {
229 segment_number = (unsigned short)(address >> 6);
230 address_to_write += SPACING * segment_number;
233 chip->hostdevice->hwspecops->write_register(data, address_to_write);
236 extern inline unsigned can_read_reg(struct chip_t *chip, unsigned short address)
238 unsigned short segment_number;
239 unsigned long address_to_read;
241 address_to_read = chip->chip_base_addr+address;
243 if ( (chip->flags & SEGMENTED) != 0) {
244 segment_number = (unsigned short)(address >> 6);
245 address_to_read += SPACING * segment_number;
247 return chip->hostdevice->hwspecops->read_register(address_to_read);