1 /**************************************************************************/
2 /* File: main.h - the CAN driver basic data structures and functions */
4 /* LinCAN - (Not only) Linux CAN bus driver */
5 /* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
6 /* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
7 /* Funded by OCERA and FRESCOR IST projects */
8 /* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
10 /* LinCAN is free software; you can redistribute it and/or modify it */
11 /* under terms of the GNU General Public License as published by the */
12 /* Free Software Foundation; either version 2, or (at your option) any */
13 /* later version. LinCAN is distributed in the hope that it will be */
14 /* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
15 /* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
16 /* General Public License for more details. You should have received a */
17 /* copy of the GNU General Public License along with LinCAN; see file */
18 /* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
19 /* Cambridge, MA 02139, USA. */
21 /* To allow use of LinCAN in the compact embedded systems firmware */
22 /* and RT-executives (RTEMS for example), main authors agree with next */
23 /* special exception: */
25 /* Including LinCAN header files in a file, instantiating LinCAN generics */
26 /* or templates, or linking other files with LinCAN objects to produce */
27 /* an application image/executable, does not by itself cause the */
28 /* resulting application image/executable to be covered by */
29 /* the GNU General Public License. */
30 /* This exception does not however invalidate any other reasons */
31 /* why the executable file might be covered by the GNU Public License. */
32 /* Publication of enhanced or derived LinCAN files is required although. */
33 /**************************************************************************/
39 #include "./constants.h"
40 #include "./ul_listbase.h"
41 #include "./can_sysdep.h"
42 #include "./can_queue.h"
43 #include "./can_bittiming.h"
47 #define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "USBCAN(debug): " fmt,\
50 #define DEBUGMSG(fmt,args...)
53 #define CANMSG(fmt,args...) can_printk(KERN_ERR "USBCAN: " fmt,##args)
56 extern can_spinlock_t canuser_manipulation_lock;
59 * struct canhardware_t - structure representing pointers to all CAN boards
60 * @nr_boards: number of present boards
61 * @rtr_queue: RTR - remote transmission request queue (expect some changes there)
62 * @rtr_lock: locking for RTR queue
63 * @candevice: array of pointers to CAN devices/boards
65 struct canhardware_t {
67 struct rtr_id *rtr_queue;
68 can_spinlock_t rtr_lock;
69 struct candevice_t *candevice[MAX_HW_CARDS];
73 * struct candevice_t - CAN device/board structure
74 * @hwname: text string with board type
75 * @candev_idx: board index in canhardware_t.candevice[]
76 * @io_addr: IO/physical MEM address
77 * @res_addr: optional reset register port
78 * @dev_base_addr: CPU translated IO/virtual MEM address
79 * @flags: board flags: %PROGRAMMABLE_IRQ .. interrupt number
80 * can be programmed into board
81 * @nr_all_chips: number of chips present on the board
82 * @nr_82527_chips: number of Intel 8257 chips
83 * @nr_sja1000_chips: number of Philips SJA100 chips
84 * @chip: array of pointers to the chip structures
85 * @hwspecops: pointer to board specific operations
86 * @hosthardware_p: pointer to the root hardware structure
87 * @sysdevptr: union reserved for pointer to bus specific
88 * device structure (case @pcidev is used for PCI devices)
90 * The structure represent configuration and state of associated board.
91 * The driver infrastructure prepares this structure and calls
92 * board type specific board_register() function. The board support provided
93 * register function fills right function pointers in @hwspecops structure.
94 * Then driver setup calls functions init_hw_data(), init_chip_data(),
95 * init_chip_data(), init_obj_data() and program_irq(). Function init_hw_data()
96 * and init_chip_data() have to specify number and types of connected chips
97 * or objects respectively.
98 * The use of @nr_all_chips is preferred over use of fields @nr_82527_chips
99 * and @nr_sja1000_chips in the board non-specific functions.
100 * The @io_addr and @dev_base_addr is filled from module parameters
101 * to the same value. The request_io function can fix-up @dev_base_addr
102 * field if virtual address is different than bus address.
105 char *hwname; /* text board type */
106 int candev_idx; /* board index in canhardware_t.candevice[] */
107 unsigned long io_addr; /* IO/physical MEM address */
108 unsigned long res_addr; /* optional reset register port */
109 can_ioptr_t dev_base_addr; /* CPU translated IO/virtual MEM address */
110 can_ioptr_t aux_base_addr; /* CPU translated IO/virtual MEM address */
114 int nr_sja1000_chips;
115 can_spinlock_t device_lock;
116 struct canchip_t *chip[MAX_HW_CHIPS];
118 struct hwspecops_t *hwspecops;
120 struct canhardware_t *hosthardware_p;
124 #ifdef CAN_ENABLE_PCI_SUPPORT
125 struct pci_dev *pcidev;
126 #endif /*CAN_ENABLE_PCI_SUPPORT*/
132 * struct canchip_t - CAN chip state and type information
133 * @chip_type: text string describing chip type
134 * @chip_idx: index of the chip in candevice_t.chip[] array
135 * @chip_irq: chip interrupt number if any
136 * @chip_base_addr: chip base address in the CPU IO or virtual memory space
137 * @flags: chip flags: %CHIP_CONFIGURED .. chip is configured,
138 * %CHIP_SEGMENTED .. access to the chip is segmented (mainly for i82527 chips)
139 * @clock: chip base clock frequency in Hz
140 * @baudrate: selected chip baudrate in Hz
141 * @write_register: write chip register function copy
142 * @read_register: read chip register function copy
143 * @chip_data: pointer for optional chip specific data extension
144 * @sja_cdr_reg: SJA specific register -
145 * holds hardware specific options for the Clock Divider
146 * register. Options defined in the sja1000.h file:
147 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
148 * @sja_ocr_reg: SJA specific register -
149 * hold hardware specific options for the Output Control
150 * register. Options defined in the sja1000.h file:
151 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
152 * %OCR_TX0_LH, %OCR_TX1_ZZ.
153 * @int_cpu_reg: Intel specific register -
154 * holds hardware specific options for the CPU Interface
155 * register. Options defined in the i82527.h file:
156 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
157 * @int_clk_reg: Intel specific register -
158 * holds hardware specific options for the Clock Out
159 * register. Options defined in the i82527.h file:
160 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
161 * @int_bus_reg: Intel specific register -
162 * holds hardware specific options for the Bus Configuration
163 * register. Options defined in the i82527.h file:
164 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
165 * @msgobj: array of pointers to individual communication objects
166 * @chipspecops: pointer to the set of chip specific object filled by init_chip_data() function
167 * @hostdevice: pointer to chip hosting board
168 * @max_objects: maximal number of communication objects connected to this chip
169 * @chip_lock: reserved for synchronization of the chip supporting routines
170 * (not used in the current driver version)
171 * @worker_thread: chip worker thread ID (RT-Linux specific field)
172 * @pend_flags: holds information about pending interrupt and tx_wake() operations
173 * (RT-Linux specific field). Masks values:
174 * %MSGOBJ_TX_REQUEST .. some of the message objects requires tx_wake() call,
175 * %MSGOBJ_IRQ_REQUEST .. chip interrupt processing required
176 * %MSGOBJ_WORKER_WAKE .. marks, that worker thread should be waked
177 * for some of above reasons
179 * The fields @write_register and @read_register are copied from
180 * corresponding fields from @hwspecops structure
181 * (chip->hostdevice->hwspecops->write_register and
182 * chip->hostdevice->hwspecops->read_register)
183 * to speedup can_write_reg() and can_read_reg() functions.
187 int chip_idx; /* chip index in candevice_t.chip[] */
189 can_ioptr_t chip_base_addr;
191 long clock; /* Chip clock in Hz */
194 void (*write_register)(unsigned data, can_ioptr_t address);
195 unsigned (*read_register)(can_ioptr_t address);
199 unsigned short sja_cdr_reg; /* sja1000 only! */
200 unsigned short sja_ocr_reg; /* sja1000 only! */
201 unsigned short int_cpu_reg; /* intel 82527 only! */
202 unsigned short int_clk_reg; /* intel 82527 only! */
203 unsigned short int_bus_reg; /* intel 82527 only! */
205 struct msgobj_t *msgobj[MAX_MSGOBJS];
207 struct chipspecops_t *chipspecops;
209 struct candevice_t *hostdevice;
211 int max_objects; /* 1 for sja1000, 15 for i82527 */
213 can_spinlock_t chip_lock;
216 pthread_t worker_thread;
217 unsigned long pend_flags;
218 #endif /*CAN_WITH_RTL*/
222 * struct msgobj_t - structure holding communication object state
224 * @minor: associated device minor number
225 * @object: object number in canchip_t structure +1
226 * @flags: message object flags
227 * @ret: field holding status of the last Tx operation
228 * @qends: pointer to message object corresponding ends structure
229 * @tx_qedge: edge corresponding to transmitted message
230 * @tx_slot: slot holding transmitted message, slot is taken from
231 * canque_test_outslot() call and is freed by canque_free_outslot()
232 * or rescheduled canque_again_outslot()
233 * @tx_retry_cnt: transmission attempt counter
234 * @tx_timeout: can be used by chip driver to check for the transmission timeout
235 * @rx_msg: temporary storage to hold received messages before
236 * calling to canque_filter_msg2edges()
237 * @hostchip: pointer to the &canchip_t structure this object belongs to
238 * @obj_used: counter of users (associated file structures for Linux
239 * userspace clients) of this object
240 * @obj_users: list of user structures of type &canuser_t.
241 * @obj_flags: message object specific flags. Masks values:
242 * %MSGOBJ_TX_REQUEST .. the message object requests TX activation
243 * %MSGOBJ_TX_LOCK .. some IRQ routine or callback on some CPU
244 * is running inside TX activation processing code
245 * @rx_preconfig_id: place to store RX message identifier for some chip types
246 * that reuse same object for TX
249 can_ioptr_t obj_base_addr;
250 unsigned int minor; /* associated device minor number */
251 unsigned int object; /* object number in canchip_t +1 for debug printk */
252 unsigned long obj_flags;
255 struct canque_ends_t *qends;
257 struct canque_edge_t *tx_qedge;
258 struct canque_slot_t *tx_slot;
260 struct timer_list tx_timeout;
262 struct canmsg_t rx_msg;
264 struct canchip_t *hostchip;
266 unsigned long rx_preconfig_id;
269 struct list_head obj_users;
272 #define CAN_USER_MAGIC 0x05402033
275 * struct canuser_t - structure holding CAN user/client state
276 * @flags: used to distinguish Linux/RT-Linux type
277 * @peers: for connection into list of object users
278 * @qends: pointer to the ends structure corresponding for this user
279 * @msgobj: communication object the user is connected to
280 * @rx_edge0: default receive queue for filter IOCTL
281 * @userinfo: stores user context specific information.
282 * The field @fileinfo.file holds pointer to open device file state structure
283 * for the Linux user-space client applications
284 * @magic: magic number to check consistency when pointer is retrieved
285 * from file private field
289 struct list_head peers;
290 struct canque_ends_t *qends;
291 struct msgobj_t *msgobj;
292 struct canque_edge_t *rx_edge0; /* simplifies IOCTL */
295 struct file *file; /* back ptr to file */
299 struct rtl_file *file;
301 #endif /*CAN_WITH_RTL*/
307 * struct hwspecops_t - hardware/board specific operations
308 * @request_io: reserve io or memory range for can board
309 * @release_io: free reserved io memory range
310 * @reset: hardware reset routine
311 * @init_hw_data: called to initialize &candevice_t structure, mainly
312 * @res_add, @nr_all_chips, @nr_82527_chips, @nr_sja1000_chips
314 * @init_chip_data: called initialize each &canchip_t structure, mainly
315 * @chip_type, @chip_base_addr, @clock and chip specific registers.
316 * It is responsible to setup &canchip_t->@chipspecops functions
317 * for non-standard chip types (type other than "i82527", "sja1000" or "sja1000p")
318 * @init_obj_data: called initialize each &msgobj_t structure,
319 * mainly @obj_base_addr field.
320 * @program_irq: program interrupt generation hardware of the board
321 * if flag %PROGRAMMABLE_IRQ is present for specified device/board
322 * @write_register: low level write register routine
323 * @read_register: low level read register routine
326 int (*request_io)(struct candevice_t *candev);
327 int (*release_io)(struct candevice_t *candev);
328 int (*reset)(struct candevice_t *candev);
329 int (*init_hw_data)(struct candevice_t *candev);
330 void (*done_hw_data)(struct candevice_t *candev);
331 int (*init_chip_data)(struct candevice_t *candev, int chipnr);
332 int (*init_obj_data)(struct canchip_t *chip, int objnr);
333 int (*program_irq)(struct candevice_t *candev);
334 void (*write_register)(unsigned data, can_ioptr_t address);
335 unsigned (*read_register)(can_ioptr_t address);
339 * struct chipspecops_t - can controller chip specific operations
340 * @chip_config: CAN chip configuration
341 * @baud_rate: set communication parameters
342 * @standard_mask: setup of mask for message filtering
343 * @extended_mask: setup of extended mask for message filtering
344 * @message15_mask: set mask of i82527 message object 15
345 * @clear_objects: clears state of all message object residing in chip
346 * @config_irqs: tunes chip hardware interrupt delivery
347 * @pre_read_config: prepares message object for message reception
348 * @pre_write_config: prepares message object for message transmission
349 * @send_msg: initiate message transmission
350 * @remote_request: configures message object and asks for RTR message
351 * @check_tx_stat: checks state of transmission engine
352 * @wakeup_tx: wakeup TX processing
353 * @filtch_rq: optional routine for propagation of outgoing edges filters to HW
354 * @enable_configuration: enable chip configuration mode
355 * @disable_configuration: disable chip configuration mode
356 * @set_btregs: configures bitrate registers
357 * @attach_to_chip: attaches to the chip, setups registers and possibly state informations
358 * @release_chip: called before chip structure removal if %CHIP_ATTACHED is set
359 * @start_chip: starts chip message processing
360 * @stop_chip: stops chip message processing
361 * @irq_handler: interrupt service routine
362 * @irq_accept: optional fast irq accept routine responsible for blocking further interrupts
364 * @set_bittiming: set bittiming parameters
365 * @get_bittiming_const: get chip specific constants for bittiming computation
367 struct chipspecops_t {
368 int (*chip_config)(struct canchip_t *chip);
369 int (*baud_rate)(struct canchip_t *chip, int rate, int clock, int sjw,
370 int sampl_pt, int flags);
371 int (*standard_mask)(struct canchip_t *chip, unsigned short code,
372 unsigned short mask);
373 int (*extended_mask)(struct canchip_t *chip, unsigned long code,
375 int (*message15_mask)(struct canchip_t *chip, unsigned long code,
377 int (*clear_objects)(struct canchip_t *chip);
378 int (*config_irqs)(struct canchip_t *chip, short irqs);
379 int (*pre_read_config)(struct canchip_t *chip, struct msgobj_t *obj);
380 int (*pre_write_config)(struct canchip_t *chip, struct msgobj_t *obj,
381 struct canmsg_t *msg);
382 int (*send_msg)(struct canchip_t *chip, struct msgobj_t *obj,
383 struct canmsg_t *msg);
384 int (*remote_request)(struct canchip_t *chip, struct msgobj_t *obj);
385 int (*check_tx_stat)(struct canchip_t *chip);
386 int (*wakeup_tx)(struct canchip_t *chip, struct msgobj_t *obj);
387 int (*filtch_rq)(struct canchip_t *chip, struct msgobj_t *obj);
388 int (*enable_configuration)(struct canchip_t *chip);
389 int (*disable_configuration)(struct canchip_t *chip);
390 int (*set_btregs)(struct canchip_t *chip, unsigned short btr0,
391 unsigned short btr1);
392 int (*attach_to_chip)(struct canchip_t *chip);
393 int (*release_chip)(struct canchip_t *chip);
394 int (*start_chip)(struct canchip_t *chip);
395 int (*stop_chip)(struct canchip_t *chip);
396 int (*irq_handler)(int irq, struct canchip_t *chip);
397 int (*irq_accept)(int irq, struct canchip_t *chip);
399 int (*set_bittiming)(struct canchip_t *chip, int brp, int sjw, int tseg1, int tseg2);
400 int (*get_bittiming_const)(struct canchip_t *chip, struct can_bittiming_const *btc);
405 struct mem_addr *next;
409 /* Structure for the RTR queue */
412 struct canmsg_t *rtr_message;
413 wait_queue_head_t rtr_wq;
418 extern int minor[MAX_TOT_CHIPS];
420 extern int baudrate[MAX_TOT_CHIPS];
421 extern int irq[MAX_IRQ];
422 extern char *hw[MAX_HW_CARDS];
423 extern unsigned long io[MAX_HW_CARDS];
424 extern long clockfreq[MAX_HW_CARDS];
425 extern int processlocal;
427 extern struct canhardware_t *hardware_p;
428 extern struct canchip_t *chips_p[MAX_TOT_CHIPS];
429 extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
431 extern struct mem_addr *mem_head;
434 #if defined(CONFIG_OC_LINCAN_PORTIO_ONLY)
435 extern inline void can_write_reg(const struct canchip_t *chip, unsigned data, unsigned reg_offs)
437 can_outb(data, chip->chip_base_addr+reg_offs);
439 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
441 return can_inb(chip->chip_base_addr+reg_offs);
443 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
444 unsigned data, unsigned reg_offs)
446 can_outb(data, obj->obj_base_addr+reg_offs);
448 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
451 return can_inb(obj->obj_base_addr+reg_offs);
454 #elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY)
455 extern inline void can_write_reg(const struct canchip_t *chip, unsigned data, unsigned reg_offs)
457 can_writeb(data, chip->chip_base_addr+reg_offs);
459 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
461 return can_readb(chip->chip_base_addr+reg_offs);
463 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
464 unsigned data, unsigned reg_offs)
466 can_writeb(data, obj->obj_base_addr+reg_offs);
468 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
471 return can_readb(obj->obj_base_addr+reg_offs);
474 #else /*CONFIG_OC_LINCAN_DYNAMICIO*/
475 #ifndef CONFIG_OC_LINCAN_DYNAMICIO
476 #define CONFIG_OC_LINCAN_DYNAMICIO
479 /* Inline function to write to the hardware registers. The argument reg_offs is
480 * relative to the memory map of the chip and not the absolute memory reg_offs.
482 extern inline void can_write_reg(const struct canchip_t *chip, unsigned data, unsigned reg_offs)
484 can_ioptr_t address_to_write;
485 address_to_write = chip->chip_base_addr+reg_offs;
486 chip->write_register(data, address_to_write);
489 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
491 can_ioptr_t address_to_read;
492 address_to_read = chip->chip_base_addr+reg_offs;
493 return chip->read_register(address_to_read);
496 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
497 unsigned data, unsigned reg_offs)
499 can_ioptr_t address_to_write;
500 address_to_write = obj->obj_base_addr+reg_offs;
501 chip->write_register(data, address_to_write);
504 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
507 can_ioptr_t address_to_read;
508 address_to_read = obj->obj_base_addr+reg_offs;
509 return chip->read_register(address_to_read);
512 #endif /*CONFIG_OC_LINCAN_DYNAMICIO*/
514 int can_base_addr_fixup(struct candevice_t *candev, can_ioptr_t new_base);
515 int can_request_io_region(unsigned long start, unsigned long n, const char *name);
516 void can_release_io_region(unsigned long start, unsigned long n);
517 int can_request_mem_region(unsigned long start, unsigned long n, const char *name);
518 void can_release_mem_region(unsigned long start, unsigned long n);
520 #ifdef CAN_ENABLE_PCI_SUPPORT
521 struct pci_dev *can_pci_get_next_untaken_device(unsigned int vendor, unsigned int device);
522 struct pci_dev *can_pci_get_next_untaken_subsyst(unsigned int vendor, unsigned int device,
523 unsigned int ss_vendor, unsigned int ss_device);
524 #endif /*CAN_ENABLE_PCI_SUPPORT*/
527 const char *boardtype;
528 int (*board_register)(struct hwspecops_t *hwspecops);
532 const struct boardtype_t* boardtype_find(const char *str);
534 int can_check_dev_taken(void *anydev);
536 #if defined(can_gettimeofday) && defined(CAN_MSG_VERSION_2) && 1
538 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
540 can_gettimeofday(ptimestamp);
542 #else /* No timestamp support, set field to zero */
544 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
546 #ifdef CAN_MSG_VERSION_2
547 ptimestamp->tv_sec = 0;
548 ptimestamp->tv_usec = 0;
549 #else /* CAN_MSG_VERSION_2 */
551 #endif /* CAN_MSG_VERSION_2 */
554 #endif /* End of timestamp source selection */
557 extern int can_rtl_priority;
558 #endif /*CAN_WITH_RTL*/
560 extern struct candevice_t* register_hotplug_dev(const char *hwname,int (*chipdataregfnc)(struct canchip_t *chip,void *data),void *devdata);
561 extern void deregister_hotplug_dev(struct candevice_t *dev);
562 extern void cleanup_hotplug_dev(struct candevice_t *dev);
564 #endif /* _CAN_MAIN_H */