embedded/app/usbcan/can/lpc17xx_can.h

   1 #ifndef LPC17XX_CAN_H_
   2 #define LPC17XX_CAN_H_
   3
   4 #include "LPC17xx.h"
   5 #include "hal_machperiph.h"
   6 #include "cpu_def.h"
   7 #include "system_def.h"
   8
   9 #include "can/can.h"
  10 #include "can/canmsg.h"
  11 #include "can/can_bittiming.h"
  12
  13 #ifdef __cplusplus
  14 extern "C"
  15 {
  16 #endif
  17
  18 // CAN1, CAN2 and CAN Acceptance filter base addresses
  19 #define CAN1_REGS_BASE  0x40044000UL
  20 #define CAN2_REGS_BASE  0x40048000UL
  21 #define CANAF_REGS_BASE 0x4003C000UL
  22
  23 // offset of CAN registers
  24 #define CAN_MOD_o               0x0000
  25 #define CAN_CMR_o               0x0004
  26 #define CAN_GSR_o               0x0008
  27 #define CAN_ICR_o               0x000C
  28 #define CAN_IER_o               0x0010
  29 #define CAN_BTR_o               0x0014
  30 #define CAN_EWL_o               0x0018
  31 #define CAN_SR_o                0x001C
  32 #define CAN_RFS_o               0x0020
  33 #define CAN_RID_o               0x0024
  34 #define CAN_RDA_o               0x0028
  35 #define CAN_RDB_o               0x002C
  36 #define CAN_TFI1_o              0x0030
  37 #define CAN_TID1_o              0x0034
  38 #define CAN_TDA1_o              0x0038
  39 #define CAN_TDB1_o              0x003C
  40 #define CAN_TFI2_o              0x0040
  41 #define CAN_TID2_o              0x0044
  42 #define CAN_TDA2_o              0x0048
  43 #define CAN_TDB2_o              0x004C
  44 #define CAN_TFI3_o              0x0050
  45 #define CAN_TID3_o              0x0054
  46 #define CAN_TDA3_o              0x0058
  47 #define CAN_TDB3_o              0x005C
  48
  49 // offset of CAN Acceptance filter registers
  50 #define CANAF_AFMR_o            0x0000
  51 #define CANAF_SFF_sa_o          0x0004
  52 #define CANAF_SFF_GRP_sa_o      0x0008
  53 #define CANAF_EFF_sa_o          0x000C
  54 #define CANAF_EFF_GRP_sa_o      0x0010
  55 #define CANAF_ENDofTable_o      0x0014
  56 #define CANAF_LUTerrAd_o        0x0018
  57 #define CANAF_LUTerr_o          0x001C
  58
  59 //----------------------------------
  60
  61 #define CAN1MOD                 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_MOD_o))
  62 #define CAN1CMR                 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_CMR_o))
  63 #define CAN1GSR                 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_GSR_o))
  64 #define CAN1ICR                 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_ICR_o))
  65 #define CAN1IER                 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_IER_o))
  66 #define CAN1BTR                 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_BTR_o))
  67 #define CAN1EWL                 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_EWL_o))
  68 #define CAN1SR                  (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_SR_o))
  69 #define CAN1RFS                 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_RFS_o))
  70 #define CAN1RID                 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_RID_o))
  71 #define CAN1RDA                 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_RDA_o))
  72 #define CAN1RDB                 (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_RDB_o))
  73 #define CAN1TFI1                (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TFI1_o))
  74 #define CAN1TID1                (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TID1_o))
  75 #define CAN1TDA1                (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDA1_o))
  76 #define CAN1TDB1                (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDB1_o))
  77 #define CAN1TFI2                (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TFI2_o))
  78 #define CAN1TID2                (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TID2_o))
  79 #define CAN1TDA2                (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDA2_o))
  80 #define CAN1TDB2                (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDB2_o))
  81 #define CAN1TFI3                (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TFI3_o))
  82 #define CAN1TID3                (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TID3_o))
  83 #define CAN1TDA3                (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDA3_o))
  84 #define CAN1TDB3                (*(volatile uint32_t*)(CAN1_REGS_BASE+CAN_TDB3_o))
  85
  86
  87
  88 #define CANAF_AFMR                              (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_AFMR_o))
  89 #define CANAF_SFF_sa                    (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_SFF_sa_o))
  90 #define CANAF_SFF_GRP_sa                (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_SFF_GRP_sa_o))
  91 #define CANAF_EFF_sa                    (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_EFF_sa_o))
  92 #define CANAF_EFF_GRP_sa                (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_EFF_GRP_sa_o))
  93 #define CANAF_ENDofTable                (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_ENDofTable_o))
  94 #define CANAF_LUTerrAd                  (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_LUTerrAd_o))
  95 #define CANAF_LUTerr                    (*(volatile uint32_t*)(CANAF_REGS_BASE+CANAF_LUTerr_o))
  96
  97 //----------------------------------
  98
  99 //CAN Global Status Register
 100 #define CAN_GSR_BS              (1<<7)
 101
 102 //CAN Interrupt and Capture Register bits
 103 #define CAN_ICR_RI              (1<<0)
 104 #define CAN_ICR_TI1             (1<<1)
 105 #define CAN_ICR_DOI             (1<<3)
 106 #define CAN_ICR_IDI             (1<<8)
 107
 108 //CAN Status Register bits
 109 #define CAN_SR_RBS              (1<<0)
 110 #define CAN_SR_DOS              (1<<1)
 111 #define CAN_SR_TBS1             (1<<2)
 112 #define CAN_SR_TCS1             (1<<3)
 113
 114 //CAN Command Register bits
 115 #define CAN_CMR_TR              (1<<0)
 116 #define CAN_CMR_AT              (1<<1)
 117 #define CAN_CMR_RRB             (1<<2)
 118 #define CAN_CMR_CDO             (1<<3)
 119 #define CAN_CMR_STB1    (1<<5)
 120
 121 //CAN Transmit Frame Information register 1 bits
 122 #define CAN_TFI1_RTR    (1<<30)
 123 #define CAN_TFI1_EXT    (1<<31)
 124
 125 //CAN Receive Frame Status register
 126 #define CAN_RFS_RTR     (1<<30)
 127 #define CAN_RFS_EXT     (1<<31)
 128
 129 //CAN Interrupt Enable Register bits
 130 #define CAN_IER_RIE             (1<<0)
 131 #define CAN_IER_TIE1    (1<<1)
 132 #define CAN_IER_DOIE    (1<<3)
 133 #define CAN_IER_IDIE    (1<<8)
 134
 135
 136 //----------------------------------
 137
 138
 139 #define PCCAN1 (1<<13) // CAN Controller 1 power/clock control bit.
 140 #define PCCAN2 (1<<14) // CAN Controller 2 power/clock control bit.
 141
 142 #define PCLK_CAN1_MASK  ((1<<27)|(1<<26))
 143 #define PCLK_CAN2_MASK  ((1<<29)|(1<<28))
 144 #define PCLK_ACF_MASK   ((1<<31)|(1<<30))
 145
 146 #define CAN1_RX_MASK    ((1<<1)|(1<<0))
 147 #define CAN1_TX_MASK    ((1<<3)|(1<<2))
 148
 149 // CAN1_RX_BIT a CAN1_TX_BIT jiz definovany v system_def.h
 150
 151 //----------------------------------
 152
 153 #define MAX_TRANSMIT_WAIT_LOOPS 10000
 154
 155 void CAN_init(struct canchip_t *chip);
 156 void CAN_send(struct canchip_t *chip, canmsg_t* msg);
 157 void CAN_recv(struct canchip_t *chip, canmsg_t* msg);
 158
 159 struct can_lmc1_chip_data
 160 {
 161         int flags;
 162 };
 163
 164
 165 // board can-lmc1 specific functions:
 166 int can_lmc1_register(struct hwspecops_t *hwspecops);
 167 int can_lmc1_init_hw_data(struct candevice_t *candev);
 168 int can_lmc1_init_chip_data(struct candevice_t *candev, int chipnr);
 169 int can_lmc1_init_obj_data(struct canchip_t *chip, int objnr);
 170 void can_lmc1_write_register(unsigned data, unsigned long address);
 171 unsigned can_lmc1_read_register(unsigned long address);
 172 int can_lmc1_request_io(struct candevice_t *candev);
 173 int can_lmc1_reset(struct candevice_t *candev);
 174 int can_lmc1_program_irq(struct candevice_t *candev);
 175
 176 // lpc17xx can chip specific functions:
 177 int lpc17xx_chip_config(struct canchip_t *chip);
 178 int lpc17xx_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
 179                                                         struct canmsg_t *msg);
 180 int lpc17xx_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
 181                                                         struct canmsg_t *msg);
 182 int lpc17xx_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj);
 183 int lpc17xx_irq_handler(int irq, struct canchip_t *chip);
 184 void lpc17xx_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj);
 185 int lpc17xx_fill_chipspecops(struct canchip_t *chip);
 186 int lpc17xx_register(struct chipspecops_t *chipspecops);
 187 int lpc17xx_attach_to_chip(struct canchip_t *chip);
 188 int lpc17xx_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj);
 189 void lpc17xx_read(struct canchip_t *chip, struct msgobj_t *obj);
 190
 191 #ifdef __cplusplus
 192 }
 193 #endif
 194
 195 #endif // LPC17XX_CAN_H_