2 * Linux CAN-bus device driver.
3 * Written for new CAN driver version by Pavel Pisa - OCERA team member
4 * email:pisa@cmp.felk.cvut.cz
5 * This software is released under the GPL-License.
6 * Version lincan-0.3 17 Jun 2004
9 #include "../include/can.h"
10 #include "../include/can_sysdep.h"
11 #include "../include/main.h"
12 #include "../include/unican_cl2.h"
13 #include "../include/setup.h"
15 #define UNICAN_PCI_VENDOR 0xFA3C
16 #define UNICAN_PCI_ID 0x0101
18 static void unican_delay(long msdelay)
21 if(!rtl_rt_system_is_idle()) {
22 rtl_delay(1000000l*msdelay);
24 #endif /*CAN_WITH_RTL*/
26 set_current_state(TASK_UNINTERRUPTIBLE);
27 schedule_timeout((msdelay*HZ)/1000+1);
32 /* * * unican Chip Functionality * * */
34 int unican_enable_configuration(struct canchip_t *chip)
39 int unican_disable_configuration(struct canchip_t *chip)
45 * unican_chip_config: - can chip configuration
46 * @chip: pointer to chip state structure
48 * Return Value: negative value reports error.
51 int unican_chip_config(struct canchip_t *chip)
54 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
58 /* disable all card interrupts */
59 ret = cl2_int_mode(chipext, INT_MODE_ALL*0);
61 CANMSG("disable interrupts by cl2_iit_mode returned %d\n",ret);
66 if (chip->baudrate == 0)
67 chip->baudrate=1000000;
69 ret = chip->chipspecops->baud_rate(chip,chip->baudrate,chip->clock,0,75,0);
71 CANMSG("can not set baudrate\n");
76 /* set interrupt inhibit time to 1 ms */
77 ret = cl2_set_iit(chipext, 10);
79 CANMSG("cl2_set_iit returned %d\n",ret);
84 /* enable start interrupt inhibit time command */
85 ret = cl2_iit_mode(chipext, 1);
87 CANMSG("cl2_iit_mode returned %d\n",ret);
92 /* enable all card interrupts */
93 ret = cl2_int_mode(chipext, INT_MODE_ALL);
95 CANMSG("cl2_iit_mode returned %d\n",ret);
100 /* generate interrupt command */
101 cl2_gen_interrupt(chipext);
108 * unican_extended_mask: - setup of extended mask for message filtering
109 * @chip: pointer to chip state structure
110 * @code: can message acceptance code
111 * @mask: can message acceptance mask
113 * Return Value: negative value reports error.
116 int unican_extended_mask(struct canchip_t *chip, unsigned long code, unsigned long mask)
122 * unican_baud_rate: - set communication parameters.
123 * @chip: pointer to chip state structure
124 * @rate: baud rate in Hz
125 * @clock: frequency of sja1000 clock in Hz (ISA osc is 14318000)
126 * @sjw: synchronization jump width (0-3) prescaled clock cycles
127 * @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio
128 * @flags: fields %BTR1_SAM, %OCMODE, %OCPOL, %OCTP, %OCTN, %CLK_OFF, %CBP
130 * Return Value: negative value reports error.
133 int unican_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
134 int sampl_pt, int flags)
137 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
141 case 5000: bt_val = CL2_BITRATE_5K; break;
142 case 10000: bt_val = CL2_BITRATE_10K; break;
143 case 20000: bt_val = CL2_BITRATE_20K; break;
144 case 50000: bt_val = CL2_BITRATE_50K; break;
145 case 100000: bt_val = CL2_BITRATE_100K; break;
146 case 125000: bt_val = CL2_BITRATE_125K; break;
147 case 200000: bt_val = CL2_BITRATE_200K; break;
148 case 250000: bt_val = CL2_BITRATE_250K; break;
149 case 500000: bt_val = CL2_BITRATE_500K; break;
150 case 800000: bt_val = CL2_BITRATE_800K; break;
151 case 1000000:bt_val = CL2_BITRATE_1M; break;
152 default: return -EINVAL;
155 ret=cl2_set_bitrate(chipext,bt_val);
156 if(ret == CL2_COMMAND_BUSY) return -EBUSY;
157 if(ret != CL2_OK) return -EINVAL;
164 * unican_read: - reads and distributes one or more received messages
165 * @chip: pointer to chip state structure
166 * @obj: pinter to CAN message queue information
168 * This is rewritten cl2_receive_data function. The direct use of CL2
169 * function would require one more message data copy to reformat message
170 * data into different structure layout. Other way is to rewrite CL2 sources.
171 * No of these solutions is perfect.
175 void unican_read(struct canchip_t *chip, struct msgobj_t *obj) {
176 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
179 unsigned long timestamp;
183 ptr16 = (__u16*)chipext->rxBufPtr;
184 u = unican_readw(ptr16++);
185 if ( !(u & CL2_MESSAGE_VALID) ) break; /* No more messages in the queue */
187 obj->rx_msg.id = ((__u32)(u & 0xFF00 )) << 16;
188 u = unican_readw(ptr16++);
189 obj->rx_msg.id |= ((__u32)( u & 0x00FF )) << 16;
190 obj->rx_msg.id |= (__u32)( u & 0xFF00 );
191 u = unican_readw(ptr16++);
192 obj->rx_msg.id |= (__u32)( u & 0x00FF );
197 if ( u & CL2_EXT_FRAME ) { /* 2.0B frame */
198 obj->rx_msg.id >>= 3;
199 obj->rx_msg.flags = MSG_EXT;
200 } else { /* 2.0A frame */
201 obj->rx_msg.id >>= 21;
202 obj->rx_msg.flags = 0;
205 /*if ( !(u & (CL2_REMOTE_FRAME<<8)) )
206 obj->rx_msg.flags |= MSG_RTR;*/
208 obj->rx_msg.length = ( (u >> 4) & 0x000F );
209 if(obj->rx_msg.length > CAN_MSG_LENGTH) obj->rx_msg.length = CAN_MSG_LENGTH;
211 for ( i = 0; i < obj->rx_msg.length; ) {
212 u = unican_readw(ptr16++);
213 obj->rx_msg.data[i++] = (__u8)( u );
214 obj->rx_msg.data[i++] = (__u8)( u >> 8 );
216 if ( obj->rx_msg.length & 0x01 ) { /* odd */
217 timestamp = ( (unican_readw(ptr16++) & 0x00FF) | (u & 0xFF00) );
219 u = unican_readw(ptr16++);
220 timestamp = (u << 8) | (u >> 8);
222 unican_writew(0x000,(__u16*)chipext->rxBufPtr);
224 #ifdef CAN_MSG_VERSION_2
225 obj->rx_msg.timestamp.tv_sec = 0;
226 obj->rx_msg.timestamp.tv_usec = timestamp;
227 #else /* CAN_MSG_VERSION_2 */
228 obj->rx_msg.timestamp = timestamp;
229 #endif /* CAN_MSG_VERSION_2 */
231 /* increment rx-buffer pointer */
232 if ( (chipext->rxBufBase + chipext->rxBufSize*16 ) <= (chipext->rxBufPtr += 16) ) {
233 chipext->rxBufPtr = chipext->rxBufBase;
236 canque_filter_msg2edges(obj->qends, &obj->rx_msg);
242 * unican_pre_read_config: - prepares message object for message reception
243 * @chip: pointer to chip state structure
244 * @obj: pointer to message object state structure
246 * Return Value: negative value reports error.
247 * Positive value indicates immediate reception of message.
250 int unican_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj)
255 #define MAX_TRANSMIT_WAIT_LOOPS 10
257 * unican_pre_write_config: - prepares message object for message transmission
258 * @chip: pointer to chip state structure
259 * @obj: pointer to message object state structure
260 * @msg: pointer to CAN message
262 * Return Value: negative value reports error.
265 int unican_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
266 struct canmsg_t *msg)
272 * unican_send_msg: - initiate message transmission
273 * @chip: pointer to chip state structure
274 * @obj: pointer to message object state structure
275 * @msg: pointer to CAN message
277 * This function is called after unican_pre_write_config() function,
278 * which prepares data in chip buffer.
279 * Return Value: negative value reports error.
282 int unican_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
283 struct canmsg_t *msg)
289 * unican_check_tx_stat: - checks state of transmission engine
290 * @chip: pointer to chip state structure
292 * Return Value: negative value reports error.
293 * Positive return value indicates transmission under way status.
294 * Zero value indicates finishing of all issued transmission requests.
297 int unican_check_tx_stat(struct canchip_t *chip)
303 * unican_set_btregs: - configures bitrate registers
304 * @chip: pointer to chip state structure
305 * @btr0: bitrate register 0
306 * @btr1: bitrate register 1
308 * Return Value: negative value reports error.
311 int unican_set_btregs(struct canchip_t *chip, unsigned short btr0,
315 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
318 bt_val=btr0 | (btr1<<8);
319 ret=cl2_set_bitrate(chipext,bt_val);
320 if(ret == CL2_COMMAND_BUSY) return -EBUSY;
321 if(ret != CL2_OK) return -EINVAL;
327 * unican_stop_chip: - starts chip message processing
328 * @chip: pointer to chip state structure
330 * Return Value: negative value reports error.
333 int unican_start_chip(struct canchip_t *chip)
339 * unican_stop_chip: - stops chip message processing
340 * @chip: pointer to chip state structure
342 * Return Value: negative value reports error.
345 int unican_stop_chip(struct canchip_t *chip)
352 * unican_remote_request: - configures message object and asks for RTR message
353 * @chip: pointer to chip state structure
354 * @obj: pointer to message object structure
356 * Return Value: negative value reports error.
359 int unican_remote_request(struct canchip_t *chip, struct msgobj_t *obj)
361 CANMSG("unican_remote_request not implemented\n");
366 * unican_standard_mask: - setup of mask for message filtering
367 * @chip: pointer to chip state structure
368 * @code: can message acceptance code
369 * @mask: can message acceptance mask
371 * Return Value: negative value reports error.
374 int unican_standard_mask(struct canchip_t *chip, unsigned short code,
377 CANMSG("unican_standard_mask not implemented\n");
382 * unican_clear_objects: - clears state of all message object residing in chip
383 * @chip: pointer to chip state structure
385 * Return Value: negative value reports error.
388 int unican_clear_objects(struct canchip_t *chip)
390 CANMSG("unican_clear_objects not implemented\n");
395 * unican_config_irqs: - tunes chip hardware interrupt delivery
396 * @chip: pointer to chip state structure
397 * @irqs: requested chip IRQ configuration
399 * Return Value: negative value reports error.
402 int unican_config_irqs(struct canchip_t *chip, short irqs)
405 CANMSG("unican_config_irqs not implemented\n");
410 * unican_irq_write_handler: - part of ISR code responsible for transmit events
411 * @chip: pointer to chip state structure
412 * @obj: pointer to attached queue description
414 * The main purpose of this function is to read message from attached queues
415 * and transfer message contents into CAN controller chip.
416 * This subroutine is called by
417 * unican_irq_write_handler() for transmit events.
420 void unican_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
423 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
424 __u16 *ptr16 = (__u16*)chipext->rxBufPtr;
426 unsigned long timestamp=0;
433 /* Do local transmitted message distribution if enabled */
435 obj->tx_slot->msg.flags |= MSG_LOCAL;
436 canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
438 /* Free transmitted slot */
439 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
444 if ( chipext->asyncTxBufSize==0 ) {
445 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_PREP);
446 return; /* No asynchronous queue configured */
450 ptr16 = (__u16*)chipext->asyncTxBufPtr;
451 if(unican_readw(ptr16) & CL2_MESSAGE_VALID)
452 return; /* No free space in asynchronous Tx queue */
454 cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
456 return; /* No more messages to send */
459 cobid = obj->tx_slot->msg.id;
461 if ( (obj->tx_slot->msg.flags & MSG_EXT) ) { /* 2.0B frame */
463 } else { /* 2.0A frame */
467 u = ((cobid>>16) & 0x00FF ) + (cobid & 0xFF00);
468 unican_writew(u,ptr16++);
470 len = obj->tx_slot->msg.length;
471 if(len > CAN_MSG_LENGTH)
472 len = CAN_MSG_LENGTH;
473 u = (len << 12) | (cobid & 0x00FF);
475 if ( !(obj->tx_slot->msg.flags & MSG_RTR) )
476 u |= CL2_REMOTE_FRAME<<8;
477 if ( obj->tx_slot->msg.flags & MSG_EXT )
478 u |= CL2_EXT_FRAME<<8;
480 unican_writew(u,ptr16++);
482 for ( i = 0; i < len-1; ) {
483 u = obj->tx_slot->msg.data[i++];
484 u |= ((__u16)obj->tx_slot->msg.data[i]<<8); i++;
485 unican_writew(u,ptr16++);
488 unican_writew(timestamp,ptr16);
490 u = obj->tx_slot->msg.data[i++];
491 u |= ((timestamp & 0x00FF)<<8);
492 unican_writew(u,ptr16++);
493 unican_writew(timestamp & 0x00FF, ptr16);
496 u = ((cobid>>16) & 0xFF00) | CL2_MESSAGE_VALID;
497 unican_writew(u,(__u16*)chipext->asyncTxBufPtr);
499 if ( (chipext->asyncTxBufBase + chipext->asyncTxBufSize*16) <=
500 (chipext->asyncTxBufPtr += 16) ) {
501 chipext->asyncTxBufPtr = chipext->asyncTxBufBase;
505 /* Do local transmitted message distribution if enabled. */
506 /* This code should not be called directly there, because it breaks strict
507 behavior of queues if O_SYNC is set. */
509 obj->tx_slot->msg.flags |= MSG_LOCAL;
510 canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
512 /* Free transmitted slot */
513 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
522 void unican_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj)
524 while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)) {
526 if(can_msgobj_test_and_clear_fl(obj,TX_REQUEST)) {
527 unican_irq_write_handler(chip, obj);
530 /*if(can_msgobj_test_and_clear_fl(obj,FILTCH_REQUEST)) {
531 unican_irq_update_filter(chip, obj);
534 can_msgobj_clear_fl(obj,TX_LOCK);
535 if(can_msgobj_test_fl(obj,TX_REQUEST))
537 if(can_msgobj_test_fl(obj,FILTCH_REQUEST) && !obj->tx_slot)
547 * unican_irq_handler: - interrupt service routine
548 * @irq: interrupt vector number, this value is system specific
549 * @chip: pointer to chip state structure
551 * Interrupt handler is activated when state of CAN controller chip changes,
552 * there is message to be read or there is more space for new messages or
553 * error occurs. The receive events results in reading of the message from
554 * CAN controller chip and distribution of message through attached
558 int unican_irq_handler(int irq, struct canchip_t *chip)
560 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
561 struct msgobj_t *obj=chip->msgobj[0];
565 if(!(chip->flags&CHIP_CONFIGURED)) {
566 CANMSG("unican_irq_handler: called for non-configured device\n");
567 return CANCHIP_IRQ_NONE;
570 if (cl2_get_status(chipext, &status) == CL2_NO_REQUEST) {
571 /* Reenable interrupts generation, this has to be even there,
572 * because irq_accept disables interrupts
574 cl2_gen_interrupt(chipext);
575 return CANCHIP_IRQ_NONE;
578 cl2_clear_interrupt(chipext);
581 if(status & CL2_CARD_ERROR) {
582 cl2_get_error(chipext, &error);
583 CANMSG("unican_irq_handler: card status=0x%04x error=0x%04x \n",status,error);
585 if(status & CL2_ASYNC_QUEUE_EMPTY) {
588 if(status & CL2_SYNC_QUEUE_EMPTY) {
589 can_msgobj_set_fl(obj,TX_REQUEST);
591 /* calls unican_irq_write_handler synchronized with other invocations */
592 unican_irq_sync_activities(chip, obj);
595 if(status & CL2_DATA_IN_RBUF) {
596 unican_read(chip, obj);
599 /* Reenable interrupts generation */
600 cl2_gen_interrupt(chipext);
602 return CANCHIP_IRQ_HANDLED;
607 * unican_irq_accept: - fast irq accept routine, blocks further interrupts
608 * @irq: interrupt vector number, this value is system specific
609 * @chip: pointer to chip state structure
611 * This routine only accepts interrupt reception and stops further
612 * incoming interrupts, but does not handle situation causing interrupt.
615 int unican_irq_accept(int irq, struct canchip_t *chip)
617 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
619 cl2_clear_interrupt(chipext);
621 return CANCHIP_IRQ_ACCEPTED;
624 /*void unican_do_tx_timeout(unsigned long data)
626 struct msgobj_t *obj=(struct msgobj_t *)data;
631 * unican_wakeup_tx: - wakeups TX processing
632 * @chip: pointer to chip state structure
633 * @obj: pointer to message object structure
635 * Return Value: negative value reports error.
638 int unican_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
640 can_preempt_disable();
642 can_msgobj_set_fl(obj,TX_REQUEST);
644 /* calls unican_irq_write_handler synchronized with other invocations
645 from kernel and IRQ context */
646 unican_irq_sync_activities(chip, obj);
648 can_preempt_enable();
654 /* * * unican Board Functionality * * */
656 #define IO_RANGE 0x1000
659 * unican_request_io: - reserve io or memory range for can board
660 * @candev: pointer to candevice/board which asks for io. Field @io_addr
661 * of @candev is used in most cases to define start of the range
663 * Return Value: The function returns zero on success or %-ENODEV on failure
666 int unican_request_io(struct candevice_t *candev)
668 unsigned long remap_addr;
669 if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME " - unican")) {
670 CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
673 if ( !( remap_addr = (long) ioremap( candev->io_addr, IO_RANGE ) ) ) {
674 CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
675 can_release_mem_region(candev->io_addr,IO_RANGE);
679 can_base_addr_fixup(candev, remap_addr);
680 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
685 * unican_elease_io - free reserved io memory range
686 * @candev: pointer to candevice/board which releases io
688 * Return Value: The function always returns zero
691 int unican_release_io(struct candevice_t *candev)
693 iounmap((void*)candev->dev_base_addr);
694 can_release_mem_region(candev->io_addr,IO_RANGE);
699 * unican_reset - hardware reset routine
700 * @candev: Pointer to candevice/board structure
702 * Return Value: The function returns zero on success or %-ENODEV on failure
705 int unican_reset(struct candevice_t *candev)
709 struct canchip_t *chip = candev->chip[0];
713 if(chip->chip_data == NULL) {
714 chip->chip_data = can_checked_malloc(sizeof(sCAN_CARD));
715 if(!chip->chip_data) return -ENOMEM;
716 memset(chip->chip_data,0,sizeof(sCAN_CARD));
717 ret = cl2_init_card(chip->chip_data,(void*)chip->chip_base_addr,chip->chip_irq);
719 CANMSG("cl2_init_card returned %d\n",ret);
724 chipext = (sCAN_CARD *)chip->chip_data;
727 /* reset and test whether the card is present */
729 cl2_reset_card(chipext);
732 ret = cl2_test_card(chipext);
733 } while((ret != CL2_OK)&&(i<10));
736 CANMSG("card check failed %d\n",ret);
740 /* start card firmware */
741 ret = cl2_start_firmware(chipext);
743 CANMSG("cl2_start_firmware returned %d\n",ret);
753 * unican_init_hw_data - Initialize hardware cards
754 * @candev: Pointer to candevice/board structure
756 * Return Value: The function always returns zero
759 int unican_init_hw_data(struct candevice_t *candev)
762 candev->nr_82527_chips=0;
763 candev->nr_sja1000_chips=0;
764 candev->nr_all_chips=1;
765 candev->flags |= CANDEV_PROGRAMMABLE_IRQ*0;
771 * unican_init_chip_data - Initialize chips
772 * @candev: Pointer to candevice/board structure
773 * @chipnr: Number of the CAN chip on the hardware card
775 * Return Value: The function always returns zero
778 int unican_init_chip_data(struct candevice_t *candev, int chipnr)
780 struct canchip_t *chip = candev->chip[chipnr];
781 chip->chip_type = "unican";
782 chip->chip_base_addr = 0;
783 chip->clock = 10000000;
784 chip->int_clk_reg = 0x0;
785 chip->int_bus_reg = 0x0;
786 chip->max_objects = 1;
787 chip->chip_base_addr=candev->io_addr;
789 CANMSG("initializing unican chip operations\n");
790 chip->chipspecops->chip_config=unican_chip_config;
791 chip->chipspecops->baud_rate=unican_baud_rate;
792 chip->chipspecops->standard_mask=unican_standard_mask;
793 chip->chipspecops->extended_mask=unican_extended_mask;
794 chip->chipspecops->message15_mask=unican_extended_mask;
795 chip->chipspecops->clear_objects=unican_clear_objects;
796 chip->chipspecops->config_irqs=unican_config_irqs;
797 chip->chipspecops->pre_read_config=unican_pre_read_config;
798 chip->chipspecops->pre_write_config=unican_pre_write_config;
799 chip->chipspecops->send_msg=unican_send_msg;
800 chip->chipspecops->check_tx_stat=unican_check_tx_stat;
801 chip->chipspecops->wakeup_tx=unican_wakeup_tx;
802 chip->chipspecops->remote_request=unican_remote_request;
803 chip->chipspecops->enable_configuration=unican_enable_configuration;
804 chip->chipspecops->disable_configuration=unican_disable_configuration;
805 chip->chipspecops->set_btregs=unican_set_btregs;
806 chip->chipspecops->start_chip=unican_start_chip;
807 chip->chipspecops->stop_chip=unican_stop_chip;
808 chip->chipspecops->irq_handler=unican_irq_handler;
809 chip->chipspecops->irq_accept=unican_irq_accept;
815 * unican_init_obj_data - Initialize message buffers
816 * @chip: Pointer to chip specific structure
817 * @objnr: Number of the message buffer
819 * Return Value: The function always returns zero
822 int unican_init_obj_data(struct canchip_t *chip, int objnr)
824 struct msgobj_t *obj=chip->msgobj[objnr];
825 obj->obj_base_addr=chip->chip_base_addr;
826 /*obj->tx_timeout.function=unican_do_tx_timeout;
827 obj->tx_timeout.data=(unsigned long)obj;*/
832 * unican_program_irq - program interrupts
833 * @candev: Pointer to candevice/board structure
835 * Return value: The function returns zero on success or %-ENODEV on failure
838 int unican_program_irq(struct candevice_t *candev)
843 int unican_register(struct hwspecops_t *hwspecops)
845 hwspecops->request_io = unican_request_io;
846 hwspecops->release_io = unican_release_io;
847 hwspecops->reset = unican_reset;
848 hwspecops->init_hw_data = unican_init_hw_data;
849 hwspecops->init_chip_data = unican_init_chip_data;
850 hwspecops->init_obj_data = unican_init_obj_data;
851 hwspecops->write_register = NULL;
852 hwspecops->read_register = NULL;
853 hwspecops->program_irq = unican_program_irq;
858 /* Unicontrols PCI board specific functions */
860 #ifdef CAN_ENABLE_PCI_SUPPORT
862 int unican_pci_request_io(struct candevice_t *candev)
864 unsigned long remap_addr;
866 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
867 if(pci_request_region(candev->sysdevptr.pcidev, 0, "unican_pci") != 0){
868 CANMSG("Request of Unican PCI range failed\n");
871 #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
872 if(pci_request_regions(candev->sysdevptr.pcidev, "kv_pcican") != 0){
873 CANMSG("Request of Unican PCI range failed\n");
876 #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
878 candev->dev_base_addr=pci_resource_start(candev->sysdevptr.pcidev,0);
879 candev->io_addr=candev->dev_base_addr;
880 candev->res_addr=candev->dev_base_addr;
882 if ( !( remap_addr = (long) ioremap( candev->io_addr, IO_RANGE ) ) ) {
883 CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
884 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
885 pci_release_region(candev->sysdevptr.pcidev, 0);
886 #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
887 pci_release_regions(candev->sysdevptr.pcidev);
888 #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
892 can_base_addr_fixup(candev, remap_addr);
893 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
894 DEBUGMSG("VMA: dev_base_addr: 0x%lx chip_base_addr: 0x%lx\n",
895 candev->dev_base_addr, candev->chip[0]->chip_base_addr);
901 int unican_pci_release_io(struct candevice_t *candev)
903 iounmap((void*)candev->dev_base_addr);
904 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
905 pci_release_region(candev->sysdevptr.pcidev, 0);
906 #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
907 pci_release_regions(candev->sysdevptr.pcidev);
908 #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
913 int unican_pci_init_hw_data(struct candevice_t *candev)
915 struct pci_dev *pcidev = NULL;
918 pcidev = pci_find_device(UNICAN_PCI_VENDOR, UNICAN_PCI_ID, pcidev);
919 if(pcidev == NULL) return -ENODEV;
920 } while(can_check_dev_taken(pcidev));
922 if (pci_enable_device (pcidev)){
923 printk(KERN_CRIT "Setup of Unican PCI failed\n");
926 candev->sysdevptr.pcidev=pcidev;
928 if(!(pci_resource_flags(pcidev,0)&IORESOURCE_MEM)){
929 printk(KERN_CRIT "Unican PCI region 0 is not MEM\n");
932 candev->dev_base_addr=pci_resource_start(pcidev,0);
933 candev->io_addr=candev->dev_base_addr;
934 candev->res_addr=candev->dev_base_addr;
936 /*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
938 candev->nr_82527_chips=0;
939 candev->nr_sja1000_chips=0;
940 candev->nr_all_chips=1;
946 int unican_pci_init_chip_data(struct candevice_t *candev, int chipnr)
949 candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
950 ret = unican_init_chip_data(candev, chipnr);
951 candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
955 int unican_pci_register(struct hwspecops_t *hwspecops)
957 hwspecops->request_io = unican_pci_request_io;
958 hwspecops->release_io = unican_pci_release_io;
959 hwspecops->reset = unican_reset;
960 hwspecops->init_hw_data = unican_pci_init_hw_data;
961 hwspecops->init_chip_data = unican_pci_init_chip_data;
962 hwspecops->init_obj_data = unican_init_obj_data;
963 hwspecops->write_register = NULL;
964 hwspecops->read_register = NULL;
965 hwspecops->program_irq = unican_program_irq;
969 #endif /*CAN_ENABLE_PCI_SUPPORT*/
971 #ifdef CAN_ENABLE_VME_SUPPORT
973 #include "unican_vme.c"
975 #endif /*CAN_ENABLE_VME_SUPPORT*/