lincan/src/ems_cpcpci.c

   1 /* ems_cpcpci.c - support for EMS-WUENSCHE CPC-PCI card
   2  * Linux CAN-bus device driver.
   3  * The card support added by Paolo Grisleri <grisleri@ce.unipr.it>
   4  * This software is released under the GPL-License.
   5  * Version lincan-0.3  17 Jun 2004
   6  */
   7
   8 #include "../include/can.h"
   9 #include "../include/can_sysdep.h"
  10 #include "../include/main.h"
  11 #include "../include/sja1000p.h"
  12
  13 #ifdef CAN_ENABLE_PCI_SUPPORT
  14
  15
  16 /* the only one supported: EMS CPC-PCI */
  17 // PGX: check identifiers name
  18 # define EMS_CPCPCI_PCICAN_VENDOR 0x110a
  19 # define EMS_CPCPCI_PCICAN_ID 0x2104
  20
  21 /*The Infineon PSB4610 PITA-2 is used as PCI to local bus bridge*/
  22 /*BAR0 - MEM - bridge control registers*/
  23
  24 /*BAR1 - MEM - parallel interface*/
  25 /* 0 more EMS control registers
  26  * 0x400 the first SJA1000
  27  * 0x600 the second SJA1000
  28  * each register occupies 4 bytes
  29  */
  30
  31 /*PSB4610 PITA-2 bridge control registers*/
  32 #define PITA2_ICR  0x00  /* Interrupt Control Register */
  33 #define   PITA2_ICR_INT0    0x00000002 /* [RC] INT0 Active/Clear */
  34 #define   PITA2_ICR_INT0_En 0x00020000 /* [RW] Enable INT0 */
  35
  36 #define PITA2_MISC 0x1C  /* Miscellaneous Register */
  37 #define   PITA2_MISC_CONFIG 0x04000000
  38                          /* Multiplexed Parallel_interface_mode */
  39
  40 #define EMS_CPCPCI_BYTES_PER_CIRCUIT 0x200
  41 /* Each CPC register occupies 4 bytes */
  42 #define EMS_CPCPCI_BYTES_PER_REG     0x4
  43
  44 // Standard value: Pushpull  (OCTP1|OCTN1|OCTP0|OCTN0|OCM1)
  45 #define EMS_CPCPCI_OCR_DEFAULT_STD 0xDA
  46 // For Galathea piggyback.
  47 #define EMS_CPCPCI_OCR_DEFAULT_GAL 0xDB
  48
  49 /*
  50
  51 The board configuration is probably following:
  52 " RX1 is connected to ground.
  53 " TX1 is not connected.
  54 " CLKO is not connected.
  55 " Setting the OCR register to 0xDA is a good idea.
  56   This means  normal output mode , push-pull and the correct polarity.
  57 " In the CDR register, you should set CBP to 1.
  58   You will probably also want to set the clock divider value to 7
  59   (meaning direct oscillator output) because the second SJA1000 chip
  60   is driven by the first one CLKOUT output.
  61
  62 */
  63
  64
  65
  66 void ems_cpcpci_disconnect_irq(struct candevice_t *candev)
  67 {
  68         /* Disable interrupts from card */
  69         writel(0, candev->dev_base_addr + PITA2_ICR);
  70 }
  71
  72 void ems_cpcpci_connect_irq(struct candevice_t *candev)
  73 {
  74         /* Enable interrupts from card */
  75         writel(PITA2_ICR_INT0_En, candev->dev_base_addr + PITA2_ICR);
  76 }
  77
  78
  79 int ems_cpcpci_request_io(struct candevice_t *candev)
  80 {
  81         unsigned long pita2_addr;
  82         unsigned long io_addr;
  83         int i;
  84
  85     #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
  86         if(pci_request_region(candev->sysdevptr.pcidev, 0, "ems_cpcpci_pita2") != 0){
  87                 CANMSG("Request of ems_cpcpci_pita2 range failed\n");
  88                 return -ENODEV;
  89         }else if(pci_request_region(candev->sysdevptr.pcidev, 1, "ems_cpcpci_io") != 0){
  90                 CANMSG("Request of ems_cpcpci_io range failed\n");
  91                 goto error_io;
  92         }
  93     #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
  94         if(pci_request_regions(candev->sysdevptr.pcidev, "EMS_CPCPCI") != 0){
  95                 CANMSG("Request of ems_cpcpci_s5920 regions failed\n");
  96                 return -ENODEV;
  97         }
  98     #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
  99
 100         pita2_addr=pci_resource_start(candev->sysdevptr.pcidev,0);
 101         if (!(candev->dev_base_addr = (long) ioremap(pita2_addr,
 102               pci_resource_len(candev->sysdevptr.pcidev,0)))) {
 103                 CANMSG("Unable to access I/O memory at: 0x%lx\n", pita2_addr);
 104                 goto error_ioremap_pita2;
 105         }
 106
 107         io_addr=pci_resource_start(candev->sysdevptr.pcidev,1);;
 108         if (!(candev->io_addr = (long) ioremap(io_addr,
 109               pci_resource_len(candev->sysdevptr.pcidev,1)))) {
 110                 CANMSG("Unable to access I/O memory at: 0x%lx\n", io_addr);
 111                 goto error_ioremap_io;
 112         }
 113
 114         candev->res_addr=candev->io_addr;
 115
 116         /*
 117          * this is redundant with chip initialization, but remap address
 118          * can change when resources are temporarily released
 119          */
 120         for(i=0;i<candev->nr_all_chips;i++) {
 121                 struct chip_t *chip=candev->chip[i];
 122                 if(!chip) continue;
 123                 chip->chip_base_addr = candev->io_addr+
 124                         0x400 + i*EMS_CPCPCI_BYTES_PER_CIRCUIT;
 125                 if(!chip->msgobj[0]) continue;
 126                 chip->msgobj[0]->obj_base_addr=chip->chip_base_addr;
 127         }
 128
 129         /* Configure PITA-2 parallel interface */
 130         writel(PITA2_MISC_CONFIG, candev->dev_base_addr + PITA2_MISC);
 131
 132         ems_cpcpci_disconnect_irq(candev);
 133
 134         return 0;
 135
 136     error_ioremap_io:
 137         iounmap((void*)candev->dev_base_addr);
 138     error_ioremap_pita2:
 139     #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
 140         pci_release_region(candev->sysdevptr.pcidev, 1);
 141     error_io:
 142         pci_release_region(candev->sysdevptr.pcidev, 0);
 143     #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
 144         pci_release_regions(candev->sysdevptr.pcidev);
 145     #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
 146
 147         return -ENODEV;
 148 }
 149
 150 int ems_cpcpci_release_io(struct candevice_t *candev)
 151 {
 152         ems_cpcpci_disconnect_irq(candev);
 153
 154         iounmap((void*)candev->io_addr);
 155         iounmap((void*)candev->dev_base_addr);
 156     #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
 157         pci_release_region(candev->sysdevptr.pcidev, 1);
 158         pci_release_region(candev->sysdevptr.pcidev, 0);
 159     #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
 160         pci_release_regions(candev->sysdevptr.pcidev);
 161     #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
 162
 163         return 0;
 164 }
 165
 166
 167 void ems_cpcpci_write_register(unsigned data, unsigned long address)
 168 {
 169         address += ((address&(EMS_CPCPCI_BYTES_PER_CIRCUIT-1))
 170                             *(EMS_CPCPCI_BYTES_PER_REG-1));
 171         writeb(data,address);
 172 }
 173
 174 unsigned ems_cpcpci_read_register(unsigned long address)
 175 {
 176         address += ((address&(EMS_CPCPCI_BYTES_PER_CIRCUIT-1))
 177                             *(EMS_CPCPCI_BYTES_PER_REG-1));
 178         return readb(address);
 179 }
 180
 181 extern can_irqreturn_t sja1000p_irq_handler(int irq, void *dev_id, struct pt_regs *regs);
 182
 183 can_irqreturn_t ems_cpcpci_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
 184 {
 185         struct chip_t *chip=(struct chip_t *)dev_id;
 186         struct candevice_t *candev=chip->hostdevice;
 187         int i;
 188         unsigned long icr;
 189
 190         icr=readl(candev->dev_base_addr + PITA2_ICR);
 191         if(!(icr & PITA2_ICR_INT0)) return IRQ_NONE;
 192
 193         /* correct way to handle interrupts from all chips connected to the one PITA-2 */
 194         do {
 195                 writel(PITA2_ICR_INT0_En | PITA2_ICR_INT0, candev->dev_base_addr + PITA2_ICR);
 196                 for(i=0;i<candev->nr_all_chips;i++){
 197                         chip=candev->chip[i];
 198                         if(!chip || !(chip->flags&CHIP_CONFIGURED))
 199                                 continue;
 200                         sja1000p_irq_handler(irq, chip, regs);
 201                 }
 202                 icr=readl(candev->dev_base_addr + PITA2_ICR);
 203         } while(icr & PITA2_ICR_INT0);
 204         return IRQ_HANDLED;
 205 }
 206
 207 int ems_cpcpci_reset(struct candevice_t *candev)
 208 {
 209         int i=0,chip_nr;
 210         struct chip_t *chip;
 211         unsigned cdr;
 212
 213         DEBUGMSG("Resetting EMS_CPCPCI hardware ...\n");
 214
 215         /* Assert PTADR# - we're in passive mode so the other bits are not important */
 216
 217         ems_cpcpci_disconnect_irq(candev);
 218
 219         for(chip_nr=0;chip_nr<candev->nr_all_chips;chip_nr++){
 220                 if(!candev->chip[chip_nr]) continue;
 221                 chip=candev->chip[chip_nr];
 222
 223                 ems_cpcpci_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
 224                 udelay(1000);
 225
 226                 cdr=ems_cpcpci_read_register(chip->chip_base_addr+SJACDR);
 227                 ems_cpcpci_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
 228
 229                 ems_cpcpci_write_register(0, chip->chip_base_addr+SJAIER);
 230
 231                 i=20;
 232                 ems_cpcpci_write_register(0, chip->chip_base_addr+SJAMOD);
 233                 while (ems_cpcpci_read_register(chip->chip_base_addr+SJAMOD)&sjaMOD_RM){
 234                         if(!i--) return -ENODEV;
 235                         udelay(1000);
 236                         ems_cpcpci_write_register(0, chip->chip_base_addr+SJAMOD);
 237                 }
 238
 239                 cdr=ems_cpcpci_read_register(chip->chip_base_addr+SJACDR);
 240                 ems_cpcpci_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
 241
 242                 ems_cpcpci_write_register(0, chip->chip_base_addr+SJAIER);
 243
 244                 ems_cpcpci_read_register(chip->chip_base_addr+SJAIR);
 245         }
 246
 247
 248         ems_cpcpci_connect_irq(candev);
 249
 250         return 0;
 251 }
 252
 253 int ems_cpcpci_init_hw_data(struct candevice_t *candev)
 254 {
 255         struct pci_dev *pcidev = NULL;
 256         int i;
 257         unsigned long l;
 258
 259         pcidev = pci_find_device(EMS_CPCPCI_PCICAN_VENDOR, EMS_CPCPCI_PCICAN_ID, pcidev);
 260         if(pcidev == NULL) return -ENODEV;
 261
 262         if (pci_enable_device (pcidev)){
 263                 printk(KERN_CRIT "Setup of EMS_CPCPCI failed\n");
 264                 return -EIO;
 265         }
 266         candev->sysdevptr.pcidev=pcidev;
 267
 268         for(i=0;i<2;i++){
 269                 if(!(pci_resource_flags(pcidev,0)&IORESOURCE_MEM)){
 270                         printk(KERN_CRIT "EMS_CPCPCI region %d is not memory\n",i);
 271                         return -EIO;
 272                 }
 273         }
 274
 275         /*request IO access temporarily to check card presence*/
 276         if(ems_cpcpci_request_io(candev)<0)
 277                 return -ENODEV;
 278
 279         /*** candev->dev_base_addr=pci_resource_start(pcidev,0); ***/
 280         /* some control registers */
 281         /*** candev->io_addr=pci_resource_start(pcidev,1); ***/
 282         /* 0 more EMS control registers
 283          * 0x400 the first SJA1000
 284          * 0x600 the second SJA1000
 285          * each register occupies 4 bytes
 286          */
 287
 288         /*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
 289
 290         for(l=0,i=0;i<4;i++){
 291                 l<<=8;
 292                 l|=readb(candev->io_addr + i*4);
 293         }
 294         i=readb(candev->io_addr + i*5);
 295
 296         CANMSG("EMS CPC-PCI check value %04lx, ID %d\n", l, i);
 297
 298         if(l!=0x55aa01cb) {
 299                 CANMSG("EMS CPC-PCI unexpected check values\n");
 300         }
 301
 302         /*if (!strcmp(candev->hwname,"ems_cpcpci"))*/
 303         candev->nr_82527_chips=0;
 304         candev->nr_sja1000_chips=2;
 305         candev->nr_all_chips=2;
 306
 307         ems_cpcpci_release_io(candev);
 308
 309         return 0;
 310 }
 311
 312 int ems_cpcpci_init_chip_data(struct candevice_t *candev, int chipnr)
 313 {
 314         if(candev->sysdevptr.pcidev==NULL)
 315                 return -ENODEV;
 316
 317         /* initialize common routines for the SJA1000 chip */
 318         sja1000p_fill_chipspecops(candev->chip[chipnr]);
 319
 320         /* special version of the IRQ handler is required for CPC-PCI board */
 321         candev->chip[chipnr]->chipspecops->irq_handler=ems_cpcpci_irq_handler;
 322
 323         candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
 324
 325         candev->chip[chipnr]->chip_base_addr = candev->io_addr+
 326                         0x400 + chipnr*EMS_CPCPCI_BYTES_PER_CIRCUIT;
 327         candev->chip[chipnr]->flags = 0;
 328         candev->chip[chipnr]->int_cpu_reg = 0;
 329         candev->chip[chipnr]->int_clk_reg = 0;
 330         candev->chip[chipnr]->int_bus_reg = 0;
 331         /* CLKOUT has to be equal to oscillator frequency to drive second chip */
 332         candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | 7;
 333         candev->chip[chipnr]->sja_ocr_reg = EMS_CPCPCI_OCR_DEFAULT_STD;
 334         candev->chip[chipnr]->clock = 16000000;
 335         candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
 336
 337         return 0;
 338 }
 339
 340 int ems_cpcpci_init_obj_data(struct chip_t *chip, int objnr)
 341 {
 342         chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
 343         return 0;
 344 }
 345
 346 int ems_cpcpci_program_irq(struct candevice_t *candev)
 347 {
 348
 349         return 0;
 350 }
 351
 352 int ems_cpcpci_register(struct hwspecops_t *hwspecops)
 353 {
 354         hwspecops->request_io = ems_cpcpci_request_io;
 355         hwspecops->release_io = ems_cpcpci_release_io;
 356         hwspecops->reset = ems_cpcpci_reset;
 357         hwspecops->init_hw_data = ems_cpcpci_init_hw_data;
 358         hwspecops->init_chip_data = ems_cpcpci_init_chip_data;
 359         hwspecops->init_obj_data = ems_cpcpci_init_obj_data;
 360         hwspecops->write_register = ems_cpcpci_write_register;
 361         hwspecops->read_register = ems_cpcpci_read_register;
 362         hwspecops->program_irq = ems_cpcpci_program_irq;
 363         return 0;
 364 }
 365
 366
 367 #endif /*CAN_ENABLE_PCI_SUPPORT*/