lincan/src/sja1000p.c

   1 /* sja1000.c
   2  * Linux CAN-bus device driver.
   3  * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
   4  * Changed for PeliCan mode SJA1000 by Tomasz Motylewski (BFAD GmbH)
   5  * T.Motylewski@bfad.de
   6  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
   7  * email:pisa@cmp.felk.cvut.cz
   8  * This software is released under the GPL-License.
   9  * Version lincan-0.3  17 Jun 2004
  10  */
  11
  12 #include "../include/can.h"
  13 #include "../include/can_sysdep.h"
  14 #include "../include/main.h"
  15 #include "../include/sja1000p.h"
  16
  17 /**
  18  * sja1000p_enable_configuration - enable chip configuration mode
  19  * @chip: pointer to chip state structure
  20  */
  21 int sja1000p_enable_configuration(struct canchip_t *chip)
  22 {
  23         int i=0;
  24         enum sja1000_PeliCAN_MOD flags;
  25
  26         can_disable_irq(chip->chip_irq);
  27
  28         flags=can_read_reg(chip,SJAMOD);
  29
  30         while ((!(flags & sjaMOD_RM)) && (i<=10)) {
  31                 can_write_reg(chip, sjaMOD_RM, SJAMOD);
  32 // TODO: configurable sjaMOD_AFM (32/16 bit acceptance filter)
  33 // config sjaMOD_LOM (listen only)
  34                 udelay(100);
  35                 i++;
  36                 flags=can_read_reg(chip, SJAMOD);
  37         }
  38         if (i>=10) {
  39                 CANMSG("Reset error\n");
  40                 can_enable_irq(chip->chip_irq);
  41                 return -ENODEV;
  42         }
  43
  44         return 0;
  45 }
  46
  47 /**
  48  * sja1000p_disable_configuration - disable chip configuration mode
  49  * @chip: pointer to chip state structure
  50  */
  51 int sja1000p_disable_configuration(struct canchip_t *chip)
  52 {
  53         int i=0;
  54         enum sja1000_PeliCAN_MOD flags;
  55
  56         flags=can_read_reg(chip,SJAMOD);
  57
  58         while ( (flags & sjaMOD_RM) && (i<=50) ) {
  59 // could be as long as 11*128 bit times after buss-off
  60                 can_write_reg(chip, 0, SJAMOD);
  61 // TODO: configurable sjaMOD_AFM (32/16 bit acceptance filter)
  62 // config sjaMOD_LOM (listen only)
  63                 udelay(100);
  64                 i++;
  65                 flags=can_read_reg(chip, SJAMOD);
  66         }
  67         if (i>=10) {
  68                 CANMSG("Error leaving reset status\n");
  69                 return -ENODEV;
  70         }
  71
  72         can_enable_irq(chip->chip_irq);
  73
  74         return 0;
  75 }
  76
  77 /**
  78  * sja1000p_chip_config: - can chip configuration
  79  * @chip: pointer to chip state structure
  80  *
  81  * This function configures chip and prepares it for message
  82  * transmission and reception. The function resets chip,
  83  * resets mask for acceptance of all messages by call to
  84  * sja1000p_extended_mask() function and then
  85  * computes and sets baudrate with use of function sja1000p_baud_rate().
  86  * Return Value: negative value reports error.
  87  * File: src/sja1000p.c
  88  */
  89 int sja1000p_chip_config(struct canchip_t *chip)
  90 {
  91         int i;
  92         unsigned char n, r;
  93
  94         if (sja1000p_enable_configuration(chip))
  95                 return -ENODEV;
  96
  97         /* Set mode, clock out, comparator */
  98         can_write_reg(chip,sjaCDR_PELICAN|chip->sja_cdr_reg,SJACDR);
  99
 100         /* Ensure, that interrupts are disabled even on the chip level now */
 101         can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER);
 102
 103         /* Set driver output configuration */
 104         can_write_reg(chip,chip->sja_ocr_reg,SJAOCR);
 105
 106         /* Simple check for chip presence */
 107         for (i=0, n=0x5a; i<8; i++, n+=0xf) {
 108                 can_write_reg(chip,n,SJAACR0+i);
 109         }
 110         for (i=0, n=0x5a; i<8; i++, n+=0xf) {
 111                 r = n^can_read_reg(chip,SJAACR0+i);
 112                 if (r) {
 113                         CANMSG("sja1000p_chip_config: chip connection broken,"
 114                                 " readback differ 0x%02x\n", r);
 115                         return -ENODEV;
 116                 }
 117         }
 118
 119
 120         if (sja1000p_extended_mask(chip,0x00000000, 0xffffffff))
 121                 return -ENODEV;
 122
 123         if (!chip->baudrate)
 124                 chip->baudrate=1000000;
 125         if (sja1000p_baud_rate(chip,chip->baudrate,chip->clock,0,75,0))
 126                 return -ENODEV;
 127
 128         /* Enable hardware interrupts */
 129         can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER);
 130
 131         sja1000p_disable_configuration(chip);
 132
 133         return 0;
 134 }
 135
 136 /**
 137  * sja1000p_extended_mask: - setup of extended mask for message filtering
 138  * @chip: pointer to chip state structure
 139  * @code: can message acceptance code
 140  * @mask: can message acceptance mask
 141  *
 142  * Return Value: negative value reports error.
 143  * File: src/sja1000p.c
 144  */
 145 int sja1000p_extended_mask(struct canchip_t *chip, unsigned long code, unsigned  long mask)
 146 {
 147         int i;
 148
 149         if (sja1000p_enable_configuration(chip))
 150                 return -ENODEV;
 151
 152 // LSB to +3, MSB to +0
 153         for(i=SJA_PeliCAN_AC_LEN; --i>=0;) {
 154                 can_write_reg(chip,code&0xff,SJAACR0+i);
 155                 can_write_reg(chip,mask&0xff,SJAAMR0+i);
 156                 code >>= 8;
 157                 mask >>= 8;
 158         }
 159
 160         DEBUGMSG("Setting acceptance code to 0x%lx\n",(unsigned long)code);
 161         DEBUGMSG("Setting acceptance mask to 0x%lx\n",(unsigned long)mask);
 162
 163         sja1000p_disable_configuration(chip);
 164
 165         return 0;
 166 }
 167
 168 /**
 169  * sja1000p_baud_rate: - set communication parameters.
 170  * @chip: pointer to chip state structure
 171  * @rate: baud rate in Hz
 172  * @clock: frequency of sja1000 clock in Hz (ISA osc is 14318000)
 173  * @sjw: synchronization jump width (0-3) prescaled clock cycles
 174  * @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio
 175  * @flags: fields %BTR1_SAM, %OCMODE, %OCPOL, %OCTP, %OCTN, %CLK_OFF, %CBP
 176  *
 177  * Return Value: negative value reports error.
 178  * File: src/sja1000p.c
 179  */
 180 int sja1000p_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
 181                                                         int sampl_pt, int flags)
 182 {
 183         int best_error = 1000000000, error;
 184         int best_tseg=0, best_brp=0, best_rate=0, brp=0;
 185         int tseg=0, tseg1=0, tseg2=0;
 186
 187         if (sja1000p_enable_configuration(chip))
 188                 return -ENODEV;
 189
 190         clock /=2;
 191
 192         /* tseg even = round down, odd = round up */
 193         for (tseg=(0+0+2)*2; tseg<=(sjaMAX_TSEG2+sjaMAX_TSEG1+2)*2+1; tseg++) {
 194                 brp = clock/((1+tseg/2)*rate)+tseg%2;
 195                 if (brp == 0 || brp > 64)
 196                         continue;
 197                 error = rate - clock/(brp*(1+tseg/2));
 198                 if (error < 0)
 199                         error = -error;
 200                 if (error <= best_error) {
 201                         best_error = error;
 202                         best_tseg = tseg/2;
 203                         best_brp = brp-1;
 204                         best_rate = clock/(brp*(1+tseg/2));
 205                 }
 206         }
 207         if (best_error && (rate/best_error < 10)) {
 208                 CANMSG("baud rate %d is not possible with %d Hz clock\n",
 209                                                                 rate, 2*clock);
 210                 CANMSG("%d bps. brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d\n",
 211                                 best_rate, best_brp, best_tseg, tseg1, tseg2);
 212                 return -EINVAL;
 213         }
 214         tseg2 = best_tseg-(sampl_pt*(best_tseg+1))/100;
 215         if (tseg2 < 0)
 216                 tseg2 = 0;
 217         if (tseg2 > sjaMAX_TSEG2)
 218                 tseg2 = sjaMAX_TSEG2;
 219         tseg1 = best_tseg-tseg2-2;
 220         if (tseg1>sjaMAX_TSEG1) {
 221                 tseg1 = sjaMAX_TSEG1;
 222                 tseg2 = best_tseg-tseg1-2;
 223         }
 224
 225         DEBUGMSG("Setting %d bps.\n", best_rate);
 226         DEBUGMSG("brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d, sampl_pt=%d\n",
 227                                         best_brp, best_tseg, tseg1, tseg2,
 228                                         (100*(best_tseg-tseg2)/(best_tseg+1)));
 229
 230
 231         can_write_reg(chip, sjw<<6 | best_brp, SJABTR0);
 232         can_write_reg(chip, ((flags & BTR1_SAM) != 0)<<7 | (tseg2<<4)
 233                                         | tseg1, SJABTR1);
 234
 235         sja1000p_disable_configuration(chip);
 236
 237         return 0;
 238 }
 239
 240 /**
 241  * sja1000p_read: - reads and distributes one or more received messages
 242  * @chip: pointer to chip state structure
 243  * @obj: pinter to CAN message queue information
 244  *
 245  * File: src/sja1000p.c
 246  */
 247 void sja1000p_read(struct canchip_t *chip, struct msgobj_t *obj) {
 248         int i, flags, len, datastart;
 249         do {
 250                 flags = can_read_reg(chip,SJAFRM);
 251                 if(flags&sjaFRM_FF) {
 252                         obj->rx_msg.id =
 253                                 (can_read_reg(chip,SJAID0)<<21) +
 254                                 (can_read_reg(chip,SJAID1)<<13) +
 255                                 (can_read_reg(chip,SJAID2)<<5) +
 256                                 (can_read_reg(chip,SJAID3)>>3);
 257                         datastart = SJADATE;
 258                 } else {
 259                         obj->rx_msg.id =
 260                                 (can_read_reg(chip,SJAID0)<<3) +
 261                                 (can_read_reg(chip,SJAID1)>>5);
 262                         datastart = SJADATS;
 263                 }
 264                 obj->rx_msg.flags =
 265                         ((flags & sjaFRM_RTR) ? MSG_RTR : 0) |
 266                         ((flags & sjaFRM_FF) ? MSG_EXT : 0);
 267                 len = flags & sjaFRM_DLC_M;
 268                 obj->rx_msg.length = len;
 269                 if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
 270                 for(i=0; i< len; i++) {
 271                         obj->rx_msg.data[i]=can_read_reg(chip,datastart+i);
 272                 }
 273
 274                 /* fill CAN message timestamp */
 275                 can_filltimestamp(&obj->rx_msg.timestamp);
 276
 277                 canque_filter_msg2edges(obj->qends, &obj->rx_msg);
 278
 279                 can_write_reg(chip, sjaCMR_RRB, SJACMR);
 280
 281         } while (can_read_reg(chip, SJASR) & sjaSR_RBS);
 282 }
 283
 284 /**
 285  * sja1000p_pre_read_config: - prepares message object for message reception
 286  * @chip: pointer to chip state structure
 287  * @obj: pointer to message object state structure
 288  *
 289  * Return Value: negative value reports error.
 290  *      Positive value indicates immediate reception of message.
 291  * File: src/sja1000p.c
 292  */
 293 int sja1000p_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj)
 294 {
 295         int status;
 296         status=can_read_reg(chip,SJASR);
 297
 298         if(status  & sjaSR_BS) {
 299                 /* Try to recover from error condition */
 300                 DEBUGMSG("sja1000p_pre_read_config bus-off recover 0x%x\n",status);
 301                 sja1000p_enable_configuration(chip);
 302                 can_write_reg(chip, 0, SJARXERR);
 303                 can_write_reg(chip, 0, SJATXERR1);
 304                 can_read_reg(chip, SJAECC);
 305                 sja1000p_disable_configuration(chip);
 306         }
 307
 308         if (!(status&sjaSR_RBS)) {
 309                 return 0;
 310         }
 311
 312         can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER); //disable interrupts for a moment
 313         sja1000p_read(chip, obj);
 314         can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER); //enable interrupts
 315         return 1;
 316 }
 317
 318 #define MAX_TRANSMIT_WAIT_LOOPS 10
 319 /**
 320  * sja1000p_pre_write_config: - prepares message object for message transmission
 321  * @chip: pointer to chip state structure
 322  * @obj: pointer to message object state structure
 323  * @msg: pointer to CAN message
 324  *
 325  * This function prepares selected message object for future initiation
 326  * of message transmission by sja1000p_send_msg() function.
 327  * The CAN message data and message ID are transfered from @msg slot
 328  * into chip buffer in this function.
 329  * Return Value: negative value reports error.
 330  * File: src/sja1000p.c
 331  */
 332 int sja1000p_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
 333                                                         struct canmsg_t *msg)
 334 {
 335         int i=0;
 336         unsigned int id;
 337         int status;
 338         int len;
 339
 340         /* Wait until Transmit Buffer Status is released */
 341         while ( !((status=can_read_reg(chip, SJASR)) & sjaSR_TBS) &&
 342                                                 i++<MAX_TRANSMIT_WAIT_LOOPS) {
 343                 udelay(i);
 344         }
 345
 346         if(status & sjaSR_BS) {
 347                 /* Try to recover from error condition */
 348                 DEBUGMSG("sja1000p_pre_write_config bus-off recover 0x%x\n",status);
 349                 sja1000p_enable_configuration(chip);
 350                 can_write_reg(chip, 0, SJARXERR);
 351                 can_write_reg(chip, 0, SJATXERR1);
 352                 can_read_reg(chip, SJAECC);
 353                 sja1000p_disable_configuration(chip);
 354         }
 355         if (!(can_read_reg(chip, SJASR) & sjaSR_TBS)) {
 356                 CANMSG("Transmit timed out, cancelling\n");
 357 // here we should check if there is no write/select waiting for this
 358 // transmit. If so, set error ret and wake up.
 359 // CHECKME: if we do not disable sjaIER_TIE (TX IRQ) here we get interrupt
 360 // immediately
 361                 can_write_reg(chip, sjaCMR_AT, SJACMR);
 362                 i=0;
 363                 while ( !(can_read_reg(chip, SJASR) & sjaSR_TBS) &&
 364                                                 i++<MAX_TRANSMIT_WAIT_LOOPS) {
 365                         udelay(i);
 366                 }
 367                 if (!(can_read_reg(chip, SJASR) & sjaSR_TBS)) {
 368                         CANMSG("Could not cancel, please reset\n");
 369                         return -EIO;
 370                 }
 371         }
 372         len = msg->length;
 373         if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
 374         /* len &= sjaFRM_DLC_M; ensured by above condition already */
 375         can_write_reg(chip, ((msg->flags&MSG_EXT)?sjaFRM_FF:0) |
 376                 ((msg->flags & MSG_RTR) ? sjaFRM_RTR : 0) | len, SJAFRM);
 377         if(msg->flags&MSG_EXT) {
 378                 id=msg->id<<3;
 379                 can_write_reg(chip, id & 0xff, SJAID3);
 380                 id >>= 8;
 381                 can_write_reg(chip, id & 0xff, SJAID2);
 382                 id >>= 8;
 383                 can_write_reg(chip, id & 0xff, SJAID1);
 384                 id >>= 8;
 385                 can_write_reg(chip, id, SJAID0);
 386                 for(i=0; i < len; i++) {
 387                         can_write_reg(chip, msg->data[i], SJADATE+i);
 388                 }
 389         } else {
 390                 id=msg->id<<5;
 391                 can_write_reg(chip, (id >> 8) & 0xff, SJAID0);
 392                 can_write_reg(chip, id & 0xff, SJAID1);
 393                 for(i=0; i < len; i++) {
 394                         can_write_reg(chip, msg->data[i], SJADATS+i);
 395                 }
 396         }
 397         return 0;
 398 }
 399
 400 /**
 401  * sja1000p_send_msg: - initiate message transmission
 402  * @chip: pointer to chip state structure
 403  * @obj: pointer to message object state structure
 404  * @msg: pointer to CAN message
 405  *
 406  * This function is called after sja1000p_pre_write_config() function,
 407  * which prepares data in chip buffer.
 408  * Return Value: negative value reports error.
 409  * File: src/sja1000p.c
 410  */
 411 int sja1000p_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
 412                                                         struct canmsg_t *msg)
 413 {
 414         can_write_reg(chip, sjaCMR_TR, SJACMR);
 415
 416         return 0;
 417 }
 418
 419 /**
 420  * sja1000p_check_tx_stat: - checks state of transmission engine
 421  * @chip: pointer to chip state structure
 422  *
 423  * Return Value: negative value reports error.
 424  *      Positive return value indicates transmission under way status.
 425  *      Zero value indicates finishing of all issued transmission requests.
 426  * File: src/sja1000p.c
 427  */
 428 int sja1000p_check_tx_stat(struct canchip_t *chip)
 429 {
 430         if (can_read_reg(chip,SJASR) & sjaSR_TCS)
 431                 return 0;
 432         else
 433                 return 1;
 434 }
 435
 436 /**
 437  * sja1000p_set_btregs: -  configures bitrate registers
 438  * @chip: pointer to chip state structure
 439  * @btr0: bitrate register 0
 440  * @btr1: bitrate register 1
 441  *
 442  * Return Value: negative value reports error.
 443  * File: src/sja1000p.c
 444  */
 445 int sja1000p_set_btregs(struct canchip_t *chip, unsigned short btr0,
 446                                                         unsigned short btr1)
 447 {
 448         if (sja1000p_enable_configuration(chip))
 449                 return -ENODEV;
 450
 451         can_write_reg(chip, btr0, SJABTR0);
 452         can_write_reg(chip, btr1, SJABTR1);
 453
 454         sja1000p_disable_configuration(chip);
 455
 456         return 0;
 457 }
 458
 459 /**
 460  * sja1000p_start_chip: -  starts chip message processing
 461  * @chip: pointer to chip state structure
 462  *
 463  * Return Value: negative value reports error.
 464  * File: src/sja1000p.c
 465  */
 466 int sja1000p_start_chip(struct canchip_t *chip)
 467 {
 468         enum sja1000_PeliCAN_MOD flags;
 469
 470         flags = can_read_reg(chip, SJAMOD) & (sjaMOD_LOM|sjaMOD_STM|sjaMOD_AFM|sjaMOD_SM);
 471         can_write_reg(chip, flags, SJAMOD);
 472
 473         return 0;
 474 }
 475
 476 /**
 477  * sja1000p_stop_chip: -  stops chip message processing
 478  * @chip: pointer to chip state structure
 479  *
 480  * Return Value: negative value reports error.
 481  * File: src/sja1000p.c
 482  */
 483 int sja1000p_stop_chip(struct canchip_t *chip)
 484 {
 485         enum sja1000_PeliCAN_MOD flags;
 486
 487         flags = can_read_reg(chip, SJAMOD) & (sjaMOD_LOM|sjaMOD_STM|sjaMOD_AFM|sjaMOD_SM);
 488         can_write_reg(chip, flags|sjaMOD_RM, SJAMOD);
 489
 490         return 0;
 491 }
 492
 493 /**
 494  * sja1000p_attach_to_chip: - attaches to the chip, setups registers and state
 495  * @chip: pointer to chip state structure
 496  *
 497  * Return Value: negative value reports error.
 498  * File: src/sja1000p.c
 499  */
 500 int sja1000p_attach_to_chip(struct canchip_t *chip)
 501 {
 502         return 0;
 503 }
 504
 505 /**
 506  * sja1000p_release_chip: - called before chip structure removal if %CHIP_ATTACHED is set
 507  * @chip: pointer to chip state structure
 508  *
 509  * Return Value: negative value reports error.
 510  * File: src/sja1000p.c
 511  */
 512 int sja1000p_release_chip(struct canchip_t *chip)
 513 {
 514         sja1000p_stop_chip(chip);
 515         can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER);
 516
 517         return 0;
 518 }
 519
 520 /**
 521  * sja1000p_remote_request: - configures message object and asks for RTR message
 522  * @chip: pointer to chip state structure
 523  * @obj: pointer to message object structure
 524  *
 525  * Return Value: negative value reports error.
 526  * File: src/sja1000p.c
 527  */
 528 int sja1000p_remote_request(struct canchip_t *chip, struct msgobj_t *obj)
 529 {
 530         CANMSG("sja1000p_remote_request not implemented\n");
 531         return -ENOSYS;
 532 }
 533
 534 /**
 535  * sja1000p_standard_mask: - setup of mask for message filtering
 536  * @chip: pointer to chip state structure
 537  * @code: can message acceptance code
 538  * @mask: can message acceptance mask
 539  *
 540  * Return Value: negative value reports error.
 541  * File: src/sja1000p.c
 542  */
 543 int sja1000p_standard_mask(struct canchip_t *chip, unsigned short code,
 544                 unsigned short mask)
 545 {
 546         CANMSG("sja1000p_standard_mask not implemented\n");
 547         return -ENOSYS;
 548 }
 549
 550 /**
 551  * sja1000p_clear_objects: - clears state of all message object residing in chip
 552  * @chip: pointer to chip state structure
 553  *
 554  * Return Value: negative value reports error.
 555  * File: src/sja1000p.c
 556  */
 557 int sja1000p_clear_objects(struct canchip_t *chip)
 558 {
 559         CANMSG("sja1000p_clear_objects not implemented\n");
 560         return -ENOSYS;
 561 }
 562
 563 /**
 564  * sja1000p_config_irqs: - tunes chip hardware interrupt delivery
 565  * @chip: pointer to chip state structure
 566  * @irqs: requested chip IRQ configuration
 567  *
 568  * Return Value: negative value reports error.
 569  * File: src/sja1000p.c
 570  */
 571 int sja1000p_config_irqs(struct canchip_t *chip, short irqs)
 572 {
 573         CANMSG("sja1000p_config_irqs not implemented\n");
 574         return -ENOSYS;
 575 }
 576
 577 /**
 578  * sja1000p_irq_write_handler: - part of ISR code responsible for transmit events
 579  * @chip: pointer to chip state structure
 580  * @obj: pointer to attached queue description
 581  *
 582  * The main purpose of this function is to read message from attached queues
 583  * and transfer message contents into CAN controller chip.
 584  * This subroutine is called by
 585  * sja1000p_irq_write_handler() for transmit events.
 586  * File: src/sja1000p.c
 587  */
 588 void sja1000p_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
 589 {
 590         int cmd;
 591
 592         if(obj->tx_slot){
 593                 /* Do local transmitted message distribution if enabled */
 594                 if (processlocal){
 595                         /* fill CAN message timestamp */
 596                         can_filltimestamp(&obj->tx_slot->msg.timestamp);
 597
 598                         obj->tx_slot->msg.flags |= MSG_LOCAL;
 599                         canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
 600                 }
 601                 /* Free transmitted slot */
 602                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 603                 obj->tx_slot=NULL;
 604         }
 605
 606         can_msgobj_clear_fl(obj,TX_PENDING);
 607         cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
 608         if(cmd<0)
 609                 return;
 610         can_msgobj_set_fl(obj,TX_PENDING);
 611
 612         if (chip->chipspecops->pre_write_config(chip, obj, &obj->tx_slot->msg)) {
 613                 obj->ret = -1;
 614                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_PREP);
 615                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 616                 obj->tx_slot=NULL;
 617                 return;
 618         }
 619         if (chip->chipspecops->send_msg(chip, obj, &obj->tx_slot->msg)) {
 620                 obj->ret = -1;
 621                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_SEND);
 622                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 623                 obj->tx_slot=NULL;
 624                 return;
 625         }
 626
 627 }
 628
 629 #define MAX_RETR 10
 630
 631 /**
 632  * sja1000p_irq_handler: - interrupt service routine
 633  * @irq: interrupt vector number, this value is system specific
 634  * @chip: pointer to chip state structure
 635  *
 636  * Interrupt handler is activated when state of CAN controller chip changes,
 637  * there is message to be read or there is more space for new messages or
 638  * error occurs. The receive events results in reading of the message from
 639  * CAN controller chip and distribution of message through attached
 640  * message queues.
 641  * File: src/sja1000p.c
 642  */
 643 int sja1000p_irq_handler(int irq, struct canchip_t *chip)
 644 {
 645         int irq_register, status, error_code;
 646         struct msgobj_t *obj=chip->msgobj[0];
 647         int loop_cnt=CHIP_MAX_IRQLOOP;
 648
 649         irq_register=can_read_reg(chip,SJAIR);
 650 //      DEBUGMSG("sja1000_irq_handler: SJAIR:%02x\n",irq_register);
 651 //      DEBUGMSG("sja1000_irq_handler: SJASR:%02x\n",
 652 //                                      can_read_reg(chip,SJASR));
 653
 654         if ((irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI)) == 0)
 655                 return CANCHIP_IRQ_NONE;
 656
 657         if(!(chip->flags&CHIP_CONFIGURED)) {
 658                 CANMSG("sja1000p_irq_handler: called for non-configured device, irq_register 0x%02x\n", irq_register);
 659                 return CANCHIP_IRQ_NONE;
 660         }
 661
 662         status=can_read_reg(chip,SJASR);
 663
 664         do {
 665
 666                 if(!loop_cnt--) {
 667                         CANMSG("sja1000p_irq_handler IRQ %d stuck\n",irq);
 668                         return CANCHIP_IRQ_STUCK;
 669                 }
 670
 671                 /* (irq_register & sjaIR_RI) */
 672                 /*      old variant using SJAIR, collides with intended use with irq_accept */
 673                 if (status & sjaSR_RBS) {
 674                         DEBUGMSG("sja1000_irq_handler: RI or RBS\n");
 675                         sja1000p_read(chip,obj);
 676                         obj->ret = 0;
 677                 }
 678
 679                 /* (irq_register & sjaIR_TI) */
 680                 /*      old variant using SJAIR, collides with intended use with irq_accept */
 681                 if ((status & sjaSR_TBS) && can_msgobj_test_fl(obj,TX_PENDING)) {
 682                         DEBUGMSG("sja1000_irq_handler: TI or TX_PENDING and TBS\n");
 683                         obj->ret = 0;
 684                         can_msgobj_set_fl(obj,TX_REQUEST);
 685                         while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
 686                                 can_msgobj_clear_fl(obj,TX_REQUEST);
 687
 688                                 if (can_read_reg(chip, SJASR) & sjaSR_TBS)
 689                                         sja1000p_irq_write_handler(chip, obj);
 690
 691                                 can_msgobj_clear_fl(obj,TX_LOCK);
 692                                 if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
 693                                 DEBUGMSG("TX looping in sja1000_irq_handler\n");
 694                         }
 695                 }
 696                 if ((irq_register & (sjaIR_EI|sjaIR_BEI|sjaIR_EPI|sjaIR_DOI)) != 0) {
 697                         // Some error happened
 698                         error_code=can_read_reg(chip,SJAECC);
 699                         CANMSG("Error: status register: 0x%x irq_register: 0x%02x error: 0x%02x\n",
 700                                 status, irq_register, error_code);
 701 // FIXME: chip should be brought to usable state. Transmission cancelled if in progress.
 702 // Reset flag set to 0 if chip is already off the bus. Full state report
 703                 obj->ret=-1;
 704
 705                         if(error_code == 0xd9) {
 706                                 obj->ret= -ENXIO;
 707                                 /* no such device or address - no ACK received */
 708                         }
 709                         if(obj->tx_retry_cnt++>MAX_RETR) {
 710                                 can_write_reg(chip, sjaCMR_AT, SJACMR); // cancel any transmition
 711                                 obj->tx_retry_cnt = 0;
 712                         }
 713                         if(status&sjaSR_BS) {
 714                                 CANMSG("bus-off, resetting sja1000p\n");
 715                                 can_write_reg(chip, 0, SJAMOD);
 716                         }
 717
 718                         if(obj->tx_slot){
 719                                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_BUS);
 720                                 /*canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 721                                 obj->tx_slot=NULL;*/
 722                         }
 723
 724                 } else {
 725                         obj->tx_retry_cnt=0;
 726                 }
 727
 728                 irq_register=can_read_reg(chip,SJAIR);
 729
 730                 status=can_read_reg(chip,SJASR);
 731
 732         } while((irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI)) ||
 733                 ((status & sjaSR_TBS) && can_msgobj_test_fl(obj,TX_PENDING)) ||
 734                 (status & sjaSR_RBS));
 735
 736         return CANCHIP_IRQ_HANDLED;
 737 }
 738
 739 /**
 740  * sja1000p_wakeup_tx: - wakeups TX processing
 741  * @chip: pointer to chip state structure
 742  * @obj: pointer to message object structure
 743  *
 744  * Function is responsible for initiating message transmition.
 745  * It is responsible for clearing of object TX_REQUEST flag
 746  *
 747  * Return Value: negative value reports error.
 748  * File: src/sja1000p.c
 749  */
 750 int sja1000p_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
 751 {
 752
 753         can_preempt_disable();
 754
 755         can_msgobj_set_fl(obj,TX_PENDING);
 756         can_msgobj_set_fl(obj,TX_REQUEST);
 757         while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
 758                 can_msgobj_clear_fl(obj,TX_REQUEST);
 759
 760                 if (can_read_reg(chip, SJASR) & sjaSR_TBS){
 761                         obj->tx_retry_cnt=0;
 762                         sja1000p_irq_write_handler(chip, obj);
 763                 }
 764
 765                 can_msgobj_clear_fl(obj,TX_LOCK);
 766                 if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
 767                 DEBUGMSG("TX looping in sja1000p_wakeup_tx\n");
 768         }
 769
 770         can_preempt_enable();
 771         return 0;
 772 }
 773
 774 int sja1000p_register(struct chipspecops_t *chipspecops)
 775 {
 776         CANMSG("initializing sja1000p chip operations\n");
 777         chipspecops->chip_config=sja1000p_chip_config;
 778         chipspecops->baud_rate=sja1000p_baud_rate;
 779         chipspecops->standard_mask=sja1000p_standard_mask;
 780         chipspecops->extended_mask=sja1000p_extended_mask;
 781         chipspecops->message15_mask=sja1000p_extended_mask;
 782         chipspecops->clear_objects=sja1000p_clear_objects;
 783         chipspecops->config_irqs=sja1000p_config_irqs;
 784         chipspecops->pre_read_config=sja1000p_pre_read_config;
 785         chipspecops->pre_write_config=sja1000p_pre_write_config;
 786         chipspecops->send_msg=sja1000p_send_msg;
 787         chipspecops->check_tx_stat=sja1000p_check_tx_stat;
 788         chipspecops->wakeup_tx=sja1000p_wakeup_tx;
 789         chipspecops->remote_request=sja1000p_remote_request;
 790         chipspecops->enable_configuration=sja1000p_enable_configuration;
 791         chipspecops->disable_configuration=sja1000p_disable_configuration;
 792         chipspecops->attach_to_chip=sja1000p_attach_to_chip;
 793         chipspecops->release_chip=sja1000p_release_chip;
 794         chipspecops->set_btregs=sja1000p_set_btregs;
 795         chipspecops->start_chip=sja1000p_start_chip;
 796         chipspecops->stop_chip=sja1000p_stop_chip;
 797         chipspecops->irq_handler=sja1000p_irq_handler;
 798         chipspecops->irq_accept=NULL;
 799         return 0;
 800 }
 801
 802 /**
 803  * sja1000p_fill_chipspecops - fills chip specific operations
 804  * @chip: pointer to chip representation structure
 805  *
 806  * The function fills chip specific operations for sja1000 (PeliCAN) chip.
 807  *
 808  * Return Value: returns negative number in the case of fail
 809  */
 810 int sja1000p_fill_chipspecops(struct canchip_t *chip)
 811 {
 812         chip->chip_type="sja1000p";
 813         chip->max_objects=1;
 814         sja1000p_register(chip->chipspecops);
 815         return 0;
 816 }