2 * Linux CAN-bus device driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
5 * email:pisa@cmp.felk.cvut.cz
6 * This software is released under the GPL-License.
7 * Version lincan-0.2 9 Jul 2003
11 * Support for the SECO M437
13 * SECO M437 is a pc104 format, i82527 controller based card
14 * produced by SECO http://www.seco.it
15 * This driver uses the Memory Mapped I/O mode, and should be
16 * working with all cards supporting this mode.
18 * Written by Fabio Parodi (fabio.parodi@iname.com)
19 * Additional changes by Giampiero Giancipoli (gianci@freemail.it)
21 * Version 0.1 08 Jun 2001
25 #include <linux/autoconf.h>
27 #include <linux/ioport.h>
28 #include <linux/delay.h>
29 #include <asm/errno.h>
32 #include "../include/main.h"
33 #include "../include/m437.h"
34 #include "../include/i82527.h"
37 * IO_RANGE is the io-memory range that gets reserved, please adjust according
38 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
39 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
41 #define IO_RANGE 0x100
44 static long base = 0L;
47 * m437_request_io: - reserve io or memory range for can board
48 * @candev: pointer to candevice/board which asks for io. Field @io_addr
49 * of @candev is used in most cases to define start of the range
51 * The function m437_request_io() is used to reserve the io-memory. If your
52 * hardware uses a dedicated memory range as hardware control registers you
53 * will have to add the code to reserve this memory as well.
54 * %IO_RANGE is the io-memory range that gets reserved, please adjust according
55 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
56 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
57 * Return Value: The function returns zero on success or %-ENODEV on failure
60 int m437_request_io(struct candevice_t *candev)
63 if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME)) {
64 CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
68 if ( !( base = (long) ioremap( candev->io_addr, IO_RANGE ) ) ) {
69 CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
70 can_release_mem_region(candev->io_addr,IO_RANGE);
74 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
79 * m437_elease_io - free reserved io memory range
80 * @candev: pointer to candevice/board which releases io
82 * The function m437_release_io() is used to free reserved io-memory.
83 * In case you have reserved more io memory, don't forget to free it here.
84 * IO_RANGE is the io-memory range that gets released, please adjust according
85 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
86 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
87 * Return Value: The function always returns zero
90 int m437_release_io(struct candevice_t *candev)
94 /* disable IRQ generation */
95 m437_write_register(iCTL_CCE, iCTL);
97 /* clear all message objects */
98 for (i=1; i<=15; i++) {
114 /* power down i82527 */
115 m437_write_register(iCPU_PWD, iCPU);
117 /* release I/O memory mapping */
118 iounmap((void*)base);
120 can_release_mem_region(candev->io_addr,IO_RANGE);
126 * m437_reset - hardware reset routine
127 * @candev: Pointer to candevice/board structure
129 * The function m437_reset() is used to give a hardware reset. This is
130 * rather hardware specific so I haven't included example code. Don't forget to
131 * check the reset status of the chip before returning.
132 * Return Value: The function returns zero on success or %-ENODEV on failure
135 int m437_reset(struct candevice_t *candev)
140 #define RESET_ADDR 0x0
145 * m437_init_hw_data - Initialize hardware cards
146 * @candev: Pointer to candevice/board structure
148 * The function m437_init_hw_data() is used to initialize the hardware
149 * structure containing information about the installed CAN-board.
150 * %RESET_ADDR represents the io-address of the hardware reset register.
151 * %NR_82527 represents the number of intel 82527 chips on the board.
152 * %NR_SJA1000 represents the number of philips sja1000 chips on the board.
153 * The flags entry can currently only be %PROGRAMMABLE_IRQ to indicate that
154 * the hardware uses programmable interrupts.
155 * Return Value: The function always returns zero
158 int m437_init_hw_data(struct candevice_t *candev)
160 DEBUGMSG("m437_init_hw_data()\n");
161 candev->res_addr=RESET_ADDR;
162 candev->nr_82527_chips=1;
163 candev->nr_sja1000_chips=0;
164 candev->nr_all_chips=1;
165 candev->flags &= ~PROGRAMMABLE_IRQ;
166 /* The M437 has no programmable IRQ */
171 #define CHIP_TYPE "i82527"
173 * m437_init_chip_data - Initialize chips
174 * @candev: Pointer to candevice/board structure
175 * @chipnr: Number of the CAN chip on the hardware card
177 * The function m437_init_chip_data() is used to initialize the hardware
178 * structure containing information about the CAN chips.
179 * %CHIP_TYPE represents the type of CAN chip. %CHIP_TYPE can be "i82527" or
181 * The @chip_base_addr entry represents the start of the 'official' memory map
182 * of the installed chip. It's likely that this is the same as the @io_addr
183 * argument supplied at module loading time.
184 * The @clock entry holds the chip clock value in Hz.
185 * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
186 * register. Options defined in the %sja1000.h file:
187 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
188 * The entry @sja_ocr_reg holds hardware specific options for the Output Control
189 * register. Options defined in the %sja1000.h file:
190 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
191 * %OCR_TX0_LH, %OCR_TX1_ZZ.
192 * The entry @int_clk_reg holds hardware specific options for the Clock Out
193 * register. Options defined in the %i82527.h file:
194 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
195 * The entry @int_bus_reg holds hardware specific options for the Bus
196 * Configuration register. Options defined in the %i82527.h file:
197 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
198 * The entry @int_cpu_reg holds hardware specific options for the cpu interface
199 * register. Options defined in the %i82527.h file:
200 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
201 * Return Value: The function always returns zero
204 int m437_init_chip_data(struct candevice_t *candev, int chipnr)
206 candev->chip[chipnr]->chip_type=CHIP_TYPE;
207 candev->chip[chipnr]->chip_base_addr=candev->io_addr;
208 candev->chip[chipnr]->clock = 16000000;
209 candev->chip[chipnr]->int_cpu_reg = iCPU_DSC | iCPU_CEN;
210 candev->chip[chipnr]->int_clk_reg =
211 iCLK_CD0 | iCLK_CD1 | iCLK_CD2 | iCLK_SL0 | iCLK_SL1;
212 candev->chip[chipnr]->int_bus_reg = iBUS_CBY;
218 * m437_init_obj_data - Initialize message buffers
219 * @chip: Pointer to chip specific structure
220 * @objnr: Number of the message buffer
222 * The function m437_init_obj_data() is used to initialize the hardware
223 * structure containing information about the different message objects on the
224 * CAN chip. In case of the sja1000 there's only one message object but on the
225 * i82527 chip there are 15.
226 * The code below is for a i82527 chip and initializes the object base addresses
227 * The entry @obj_base_addr represents the first memory address of the message
228 * object. In case of the sja1000 @obj_base_addr is taken the same as the chips
230 * Unless the hardware uses a segmented memory map, flags can be set zero.
231 * Return Value: The function always returns zero
234 int m437_init_obj_data(struct chip_t *chip, int objnr)
236 chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr+(objnr+1)*0x10;
237 chip->msgobj[objnr]->flags=0;
243 * m437_program_irq - program interrupts
244 * @candev: Pointer to candevice/board structure
246 * The function m437_program_irq() is used for hardware that uses
247 * programmable interrupts. If your hardware doesn't use programmable interrupts
248 * you should not set the @candevices_t->flags entry to %PROGRAMMABLE_IRQ and
249 * leave this function unedited. Again this function is hardware specific so
250 * there's no example code.
251 * Return value: The function returns zero on success or %-ENODEV on failure
254 int m437_program_irq(struct candevice_t *candev)
260 * m437_write_register - Low level write register routine
261 * @data: data to be written
262 * @address: memory address to write to
264 * The function m437_write_register() is used to write to hardware registers
265 * on the CAN chip. You should only have to edit this function if your hardware
266 * uses some specific write process.
267 * Return Value: The function does not return a value
270 void m437_write_register(unsigned char data, unsigned long address)
272 writeb(data,base+address);
276 * m437_read_register - Low level read register routine
277 * @address: memory address to read from
279 * The function m437_read_register() is used to read from hardware registers
280 * on the CAN chip. You should only have to edit this function if your hardware
281 * uses some specific read process.
282 * Return Value: The function returns the value stored in @address
285 unsigned m437_read_register(unsigned long address)
287 return readb(base+address);
290 /* !!! Don't change this function !!! */
291 int m437_register(struct hwspecops_t *hwspecops)
293 DEBUGMSG("m437_register()\n");
294 hwspecops->request_io = m437_request_io;
295 hwspecops->release_io = m437_release_io;
296 hwspecops->reset = m437_reset;
297 hwspecops->init_hw_data = m437_init_hw_data;
298 hwspecops->init_chip_data = m437_init_chip_data;
299 hwspecops->init_obj_data = m437_init_obj_data;
300 hwspecops->write_register = m437_write_register;
301 hwspecops->read_register = m437_read_register;
302 hwspecops->program_irq = m437_program_irq;