lincan/src/sja1000p.c

   1 /* sja1000.c
   2  * Linux CAN-bus device driver.
   3  * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
   4  * Changed for PeliCan mode SJA1000 by Tomasz Motylewski (BFAD GmbH)
   5  * T.Motylewski@bfad.de
   6  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
   7  * email:pisa@cmp.felk.cvut.cz
   8  * This software is released under the GPL-License.
   9  * Version lincan-0.3  17 Jun 2004
  10  */
  11
  12 #include "../include/can.h"
  13 #include "../include/can_sysdep.h"
  14 #include "../include/main.h"
  15 #include "../include/sja1000p.h"
  16
  17 /**
  18  * sja1000p_enable_configuration - enable chip configuration mode
  19  * @chip: pointer to chip state structure
  20  */
  21 int sja1000p_enable_configuration(struct chip_t *chip)
  22 {
  23         int i=0;
  24         enum sja1000_PeliCAN_MOD flags;
  25
  26         can_disable_irq(chip->chip_irq);
  27
  28         flags=can_read_reg(chip,SJAMOD);
  29
  30         while ((!(flags & sjaMOD_RM)) && (i<=10)) {
  31                 can_write_reg(chip, sjaMOD_RM, SJAMOD);
  32 // TODO: configurable sjaMOD_AFM (32/16 bit acceptance filter)
  33 // config sjaMOD_LOM (listen only)
  34                 udelay(100);
  35                 i++;
  36                 flags=can_read_reg(chip, SJAMOD);
  37         }
  38         if (i>=10) {
  39                 CANMSG("Reset error\n");
  40                 can_enable_irq(chip->chip_irq);
  41                 return -ENODEV;
  42         }
  43
  44         return 0;
  45 }
  46
  47 /**
  48  * sja1000p_disable_configuration - disable chip configuration mode
  49  * @chip: pointer to chip state structure
  50  */
  51 int sja1000p_disable_configuration(struct chip_t *chip)
  52 {
  53         int i=0;
  54         enum sja1000_PeliCAN_MOD flags;
  55
  56         flags=can_read_reg(chip,SJAMOD);
  57
  58         while ( (flags & sjaMOD_RM) && (i<=50) ) {
  59 // could be as long as 11*128 bit times after buss-off
  60                 can_write_reg(chip, 0, SJAMOD);
  61 // TODO: configurable sjaMOD_AFM (32/16 bit acceptance filter)
  62 // config sjaMOD_LOM (listen only)
  63                 udelay(100);
  64                 i++;
  65                 flags=can_read_reg(chip, SJAMOD);
  66         }
  67         if (i>=10) {
  68                 CANMSG("Error leaving reset status\n");
  69                 return -ENODEV;
  70         }
  71
  72         can_enable_irq(chip->chip_irq);
  73
  74         return 0;
  75 }
  76
  77 /**
  78  * sja1000p_chip_config: - can chip configuration
  79  * @chip: pointer to chip state structure
  80  *
  81  * This function configures chip and prepares it for message
  82  * transmission and reception. The function resets chip,
  83  * resets mask for acceptance of all messages by call to
  84  * sja1000p_extended_mask() function and then
  85  * computes and sets baudrate with use of function sja1000p_baud_rate().
  86  * Return Value: negative value reports error.
  87  * File: src/sja1000p.c
  88  */
  89 int sja1000p_chip_config(struct chip_t *chip)
  90 {
  91         int i;
  92         unsigned char n, r;
  93
  94         if (sja1000p_enable_configuration(chip))
  95                 return -ENODEV;
  96
  97         /* Set mode, clock out, comparator */
  98         can_write_reg(chip,sjaCDR_PELICAN|chip->sja_cdr_reg,SJACDR);
  99         /* Set driver output configuration */
 100         can_write_reg(chip,chip->sja_ocr_reg,SJAOCR);
 101
 102         /* Simple check for chip presence */
 103         for (i=0, n=0x5a; i<8; i++, n+=0xf) {
 104                 can_write_reg(chip,n,SJAACR0+i);
 105         }
 106         for (i=0, n=0x5a; i<8; i++, n+=0xf) {
 107                 r = n^can_read_reg(chip,SJAACR0+i);
 108                 if (r) {
 109                         CANMSG("sja1000p_chip_config: chip connection broken,"
 110                                 " readback differ 0x%02x\n", r);
 111                         return -ENODEV;
 112                 }
 113         }
 114
 115
 116         if (sja1000p_extended_mask(chip,0x00000000, 0xffffffff))
 117                 return -ENODEV;
 118
 119         if (!chip->baudrate)
 120                 chip->baudrate=1000000;
 121         if (sja1000p_baud_rate(chip,chip->baudrate,chip->clock,0,75,0))
 122                 return -ENODEV;
 123
 124         /* Enable hardware interrupts */
 125         can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER);
 126
 127         sja1000p_disable_configuration(chip);
 128
 129         return 0;
 130 }
 131
 132 /**
 133  * sja1000p_extended_mask: - setup of extended mask for message filtering
 134  * @chip: pointer to chip state structure
 135  * @code: can message acceptance code
 136  * @mask: can message acceptance mask
 137  *
 138  * Return Value: negative value reports error.
 139  * File: src/sja1000p.c
 140  */
 141 int sja1000p_extended_mask(struct chip_t *chip, unsigned long code, unsigned  long mask)
 142 {
 143         int i;
 144
 145         if (sja1000p_enable_configuration(chip))
 146                 return -ENODEV;
 147
 148 // LSB to +3, MSB to +0
 149         for(i=SJA_PeliCAN_AC_LEN; --i>=0;) {
 150                 can_write_reg(chip,code&0xff,SJAACR0+i);
 151                 can_write_reg(chip,mask&0xff,SJAAMR0+i);
 152                 code >>= 8;
 153                 mask >>= 8;
 154         }
 155
 156         DEBUGMSG("Setting acceptance code to 0x%lx\n",(unsigned long)code);
 157         DEBUGMSG("Setting acceptance mask to 0x%lx\n",(unsigned long)mask);
 158
 159         sja1000p_disable_configuration(chip);
 160
 161         return 0;
 162 }
 163
 164 /**
 165  * sja1000p_baud_rate: - set communication parameters.
 166  * @chip: pointer to chip state structure
 167  * @rate: baud rate in Hz
 168  * @clock: frequency of sja1000 clock in Hz (ISA osc is 14318000)
 169  * @sjw: synchronization jump width (0-3) prescaled clock cycles
 170  * @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio
 171  * @flags: fields %BTR1_SAM, %OCMODE, %OCPOL, %OCTP, %OCTN, %CLK_OFF, %CBP
 172  *
 173  * Return Value: negative value reports error.
 174  * File: src/sja1000p.c
 175  */
 176 int sja1000p_baud_rate(struct chip_t *chip, int rate, int clock, int sjw,
 177                                                         int sampl_pt, int flags)
 178 {
 179         int best_error = 1000000000, error;
 180         int best_tseg=0, best_brp=0, best_rate=0, brp=0;
 181         int tseg=0, tseg1=0, tseg2=0;
 182
 183         if (sja1000p_enable_configuration(chip))
 184                 return -ENODEV;
 185
 186         clock /=2;
 187
 188         /* tseg even = round down, odd = round up */
 189         for (tseg=(0+0+2)*2; tseg<=(sjaMAX_TSEG2+sjaMAX_TSEG1+2)*2+1; tseg++) {
 190                 brp = clock/((1+tseg/2)*rate)+tseg%2;
 191                 if (brp == 0 || brp > 64)
 192                         continue;
 193                 error = rate - clock/(brp*(1+tseg/2));
 194                 if (error < 0)
 195                         error = -error;
 196                 if (error <= best_error) {
 197                         best_error = error;
 198                         best_tseg = tseg/2;
 199                         best_brp = brp-1;
 200                         best_rate = clock/(brp*(1+tseg/2));
 201                 }
 202         }
 203         if (best_error && (rate/best_error < 10)) {
 204                 CANMSG("baud rate %d is not possible with %d Hz clock\n",
 205                                                                 rate, 2*clock);
 206                 CANMSG("%d bps. brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d\n",
 207                                 best_rate, best_brp, best_tseg, tseg1, tseg2);
 208                 return -EINVAL;
 209         }
 210         tseg2 = best_tseg-(sampl_pt*(best_tseg+1))/100;
 211         if (tseg2 < 0)
 212                 tseg2 = 0;
 213         if (tseg2 > sjaMAX_TSEG2)
 214                 tseg2 = sjaMAX_TSEG2;
 215         tseg1 = best_tseg-tseg2-2;
 216         if (tseg1>sjaMAX_TSEG1) {
 217                 tseg1 = sjaMAX_TSEG1;
 218                 tseg2 = best_tseg-tseg1-2;
 219         }
 220
 221         DEBUGMSG("Setting %d bps.\n", best_rate);
 222         DEBUGMSG("brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d, sampl_pt=%d\n",
 223                                         best_brp, best_tseg, tseg1, tseg2,
 224                                         (100*(best_tseg-tseg2)/(best_tseg+1)));
 225
 226
 227         can_write_reg(chip, sjw<<6 | best_brp, SJABTR0);
 228         can_write_reg(chip, ((flags & BTR1_SAM) != 0)<<7 | (tseg2<<4)
 229                                         | tseg1, SJABTR1);
 230
 231         sja1000p_disable_configuration(chip);
 232
 233         return 0;
 234 }
 235
 236 /**
 237  * sja1000p_read: - reads and distributes one or more received messages
 238  * @chip: pointer to chip state structure
 239  * @obj: pinter to CAN message queue information
 240  *
 241  * File: src/sja1000p.c
 242  */
 243 void sja1000p_read(struct chip_t *chip, struct msgobj_t *obj) {
 244         int i, flags, len, datastart;
 245         do {
 246                 flags = can_read_reg(chip,SJAFRM);
 247                 if(flags&sjaFRM_FF) {
 248                         obj->rx_msg.id =
 249                                 (can_read_reg(chip,SJAID0)<<21) +
 250                                 (can_read_reg(chip,SJAID1)<<13) +
 251                                 (can_read_reg(chip,SJAID2)<<5) +
 252                                 (can_read_reg(chip,SJAID3)>>3);
 253                         datastart = SJADATE;
 254                 } else {
 255                         obj->rx_msg.id =
 256                                 (can_read_reg(chip,SJAID0)<<3) +
 257                                 (can_read_reg(chip,SJAID1)>>5);
 258                         datastart = SJADATS;
 259                 }
 260                 obj->rx_msg.flags =
 261                         ((flags & sjaFRM_RTR) ? MSG_RTR : 0) |
 262                         ((flags & sjaFRM_FF) ? MSG_EXT : 0);
 263                 len = flags & sjaFRM_DLC_M;
 264                 obj->rx_msg.length = len;
 265                 if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
 266                 for(i=0; i< len; i++) {
 267                         obj->rx_msg.data[i]=can_read_reg(chip,datastart+i);
 268                 }
 269
 270                 /* fill CAN message timestamp */
 271                 can_filltimestamp(&obj->rx_msg.timestamp);
 272
 273                 canque_filter_msg2edges(obj->qends, &obj->rx_msg);
 274
 275                 can_write_reg(chip, sjaCMR_RRB, SJACMR);
 276
 277         } while (can_read_reg(chip, SJASR) & sjaSR_RBS);
 278 }
 279
 280 /**
 281  * sja1000p_pre_read_config: - prepares message object for message reception
 282  * @chip: pointer to chip state structure
 283  * @obj: pointer to message object state structure
 284  *
 285  * Return Value: negative value reports error.
 286  *      Positive value indicates immediate reception of message.
 287  * File: src/sja1000p.c
 288  */
 289 int sja1000p_pre_read_config(struct chip_t *chip, struct msgobj_t *obj)
 290 {
 291         int status;
 292         status=can_read_reg(chip,SJASR);
 293
 294         if(status  & sjaSR_BS) {
 295                 /* Try to recover from error condition */
 296                 DEBUGMSG("sja1000p_pre_read_config bus-off recover 0x%x\n",status);
 297                 sja1000p_enable_configuration(chip);
 298                 can_write_reg(chip, 0, SJARXERR);
 299                 can_write_reg(chip, 0, SJATXERR1);
 300                 can_read_reg(chip, SJAECC);
 301                 sja1000p_disable_configuration(chip);
 302         }
 303
 304         if (!(status&sjaSR_RBS)) {
 305                 return 0;
 306         }
 307
 308         can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER); //disable interrupts for a moment
 309         sja1000p_read(chip, obj);
 310         can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER); //enable interrupts
 311         return 1;
 312 }
 313
 314 #define MAX_TRANSMIT_WAIT_LOOPS 10
 315 /**
 316  * sja1000p_pre_write_config: - prepares message object for message transmission
 317  * @chip: pointer to chip state structure
 318  * @obj: pointer to message object state structure
 319  * @msg: pointer to CAN message
 320  *
 321  * This function prepares selected message object for future initiation
 322  * of message transmission by sja1000p_send_msg() function.
 323  * The CAN message data and message ID are transfered from @msg slot
 324  * into chip buffer in this function.
 325  * Return Value: negative value reports error.
 326  * File: src/sja1000p.c
 327  */
 328 int sja1000p_pre_write_config(struct chip_t *chip, struct msgobj_t *obj,
 329                                                         struct canmsg_t *msg)
 330 {
 331         int i=0;
 332         unsigned int id;
 333         int status;
 334         int len;
 335
 336         /* Wait until Transmit Buffer Status is released */
 337         while ( !((status=can_read_reg(chip, SJASR)) & sjaSR_TBS) &&
 338                                                 i++<MAX_TRANSMIT_WAIT_LOOPS) {
 339                 udelay(i);
 340         }
 341
 342         if(status & sjaSR_BS) {
 343                 /* Try to recover from error condition */
 344                 DEBUGMSG("sja1000p_pre_write_config bus-off recover 0x%x\n",status);
 345                 sja1000p_enable_configuration(chip);
 346                 can_write_reg(chip, 0, SJARXERR);
 347                 can_write_reg(chip, 0, SJATXERR1);
 348                 can_read_reg(chip, SJAECC);
 349                 sja1000p_disable_configuration(chip);
 350         }
 351         if (!(can_read_reg(chip, SJASR) & sjaSR_TBS)) {
 352                 CANMSG("Transmit timed out, cancelling\n");
 353 // here we should check if there is no write/select waiting for this
 354 // transmit. If so, set error ret and wake up.
 355 // CHECKME: if we do not disable sjaIER_TIE (TX IRQ) here we get interrupt
 356 // immediately
 357                 can_write_reg(chip, sjaCMR_AT, SJACMR);
 358                 i=0;
 359                 while ( !(can_read_reg(chip, SJASR) & sjaSR_TBS) &&
 360                                                 i++<MAX_TRANSMIT_WAIT_LOOPS) {
 361                         udelay(i);
 362                 }
 363                 if (!(can_read_reg(chip, SJASR) & sjaSR_TBS)) {
 364                         CANMSG("Could not cancel, please reset\n");
 365                         return -EIO;
 366                 }
 367         }
 368         len = msg->length;
 369         if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
 370         /* len &= sjaFRM_DLC_M; ensured by above condition already */
 371         can_write_reg(chip, ((msg->flags&MSG_EXT)?sjaFRM_FF:0) |
 372                 ((msg->flags & MSG_RTR) ? sjaFRM_RTR : 0) | len, SJAFRM);
 373         if(msg->flags&MSG_EXT) {
 374                 id=msg->id<<3;
 375                 can_write_reg(chip, id & 0xff, SJAID3);
 376                 id >>= 8;
 377                 can_write_reg(chip, id & 0xff, SJAID2);
 378                 id >>= 8;
 379                 can_write_reg(chip, id & 0xff, SJAID1);
 380                 id >>= 8;
 381                 can_write_reg(chip, id, SJAID0);
 382                 for(i=0; i < len; i++) {
 383                         can_write_reg(chip, msg->data[i], SJADATE+i);
 384                 }
 385         } else {
 386                 id=msg->id<<5;
 387                 can_write_reg(chip, (id >> 8) & 0xff, SJAID0);
 388                 can_write_reg(chip, id & 0xff, SJAID1);
 389                 for(i=0; i < len; i++) {
 390                         can_write_reg(chip, msg->data[i], SJADATS+i);
 391                 }
 392         }
 393         return 0;
 394 }
 395
 396 /**
 397  * sja1000p_send_msg: - initiate message transmission
 398  * @chip: pointer to chip state structure
 399  * @obj: pointer to message object state structure
 400  * @msg: pointer to CAN message
 401  *
 402  * This function is called after sja1000p_pre_write_config() function,
 403  * which prepares data in chip buffer.
 404  * Return Value: negative value reports error.
 405  * File: src/sja1000p.c
 406  */
 407 int sja1000p_send_msg(struct chip_t *chip, struct msgobj_t *obj,
 408                                                         struct canmsg_t *msg)
 409 {
 410         can_write_reg(chip, sjaCMR_TR, SJACMR);
 411
 412         return 0;
 413 }
 414
 415 /**
 416  * sja1000p_check_tx_stat: - checks state of transmission engine
 417  * @chip: pointer to chip state structure
 418  *
 419  * Return Value: negative value reports error.
 420  *      Positive return value indicates transmission under way status.
 421  *      Zero value indicates finishing of all issued transmission requests.
 422  * File: src/sja1000p.c
 423  */
 424 int sja1000p_check_tx_stat(struct chip_t *chip)
 425 {
 426         if (can_read_reg(chip,SJASR) & sjaSR_TCS)
 427                 return 0;
 428         else
 429                 return 1;
 430 }
 431
 432 /**
 433  * sja1000p_set_btregs: -  configures bitrate registers
 434  * @chip: pointer to chip state structure
 435  * @btr0: bitrate register 0
 436  * @btr1: bitrate register 1
 437  *
 438  * Return Value: negative value reports error.
 439  * File: src/sja1000p.c
 440  */
 441 int sja1000p_set_btregs(struct chip_t *chip, unsigned short btr0,
 442                                                         unsigned short btr1)
 443 {
 444         if (sja1000p_enable_configuration(chip))
 445                 return -ENODEV;
 446
 447         can_write_reg(chip, btr0, SJABTR0);
 448         can_write_reg(chip, btr1, SJABTR1);
 449
 450         sja1000p_disable_configuration(chip);
 451
 452         return 0;
 453 }
 454
 455 /**
 456  * sja1000p_start_chip: -  starts chip message processing
 457  * @chip: pointer to chip state structure
 458  *
 459  * Return Value: negative value reports error.
 460  * File: src/sja1000p.c
 461  */
 462 int sja1000p_start_chip(struct chip_t *chip)
 463 {
 464         enum sja1000_PeliCAN_MOD flags;
 465
 466         flags = can_read_reg(chip, SJAMOD) & (sjaMOD_LOM|sjaMOD_STM|sjaMOD_AFM|sjaMOD_SM);
 467         can_write_reg(chip, flags, SJAMOD);
 468
 469         return 0;
 470 }
 471
 472 /**
 473  * sja1000p_stop_chip: -  stops chip message processing
 474  * @chip: pointer to chip state structure
 475  *
 476  * Return Value: negative value reports error.
 477  * File: src/sja1000p.c
 478  */
 479 int sja1000p_stop_chip(struct chip_t *chip)
 480 {
 481         enum sja1000_PeliCAN_MOD flags;
 482
 483         flags = can_read_reg(chip, SJAMOD) & (sjaMOD_LOM|sjaMOD_STM|sjaMOD_AFM|sjaMOD_SM);
 484         can_write_reg(chip, flags|sjaMOD_RM, SJAMOD);
 485
 486         return 0;
 487 }
 488
 489
 490 /**
 491  * sja1000p_remote_request: - configures message object and asks for RTR message
 492  * @chip: pointer to chip state structure
 493  * @obj: pointer to message object structure
 494  *
 495  * Return Value: negative value reports error.
 496  * File: src/sja1000p.c
 497  */
 498 int sja1000p_remote_request(struct chip_t *chip, struct msgobj_t *obj)
 499 {
 500         CANMSG("sja1000p_remote_request not implemented\n");
 501         return -ENOSYS;
 502 }
 503
 504 /**
 505  * sja1000p_standard_mask: - setup of mask for message filtering
 506  * @chip: pointer to chip state structure
 507  * @code: can message acceptance code
 508  * @mask: can message acceptance mask
 509  *
 510  * Return Value: negative value reports error.
 511  * File: src/sja1000p.c
 512  */
 513 int sja1000p_standard_mask(struct chip_t *chip, unsigned short code,
 514                 unsigned short mask)
 515 {
 516         CANMSG("sja1000p_standard_mask not implemented\n");
 517         return -ENOSYS;
 518 }
 519
 520 /**
 521  * sja1000p_clear_objects: - clears state of all message object residing in chip
 522  * @chip: pointer to chip state structure
 523  *
 524  * Return Value: negative value reports error.
 525  * File: src/sja1000p.c
 526  */
 527 int sja1000p_clear_objects(struct chip_t *chip)
 528 {
 529         CANMSG("sja1000p_clear_objects not implemented\n");
 530         return -ENOSYS;
 531 }
 532
 533 /**
 534  * sja1000p_config_irqs: - tunes chip hardware interrupt delivery
 535  * @chip: pointer to chip state structure
 536  * @irqs: requested chip IRQ configuration
 537  *
 538  * Return Value: negative value reports error.
 539  * File: src/sja1000p.c
 540  */
 541 int sja1000p_config_irqs(struct chip_t *chip, short irqs)
 542 {
 543         CANMSG("sja1000p_config_irqs not implemented\n");
 544         return -ENOSYS;
 545 }
 546
 547 /**
 548  * sja1000p_irq_write_handler: - part of ISR code responsible for transmit events
 549  * @chip: pointer to chip state structure
 550  * @obj: pointer to attached queue description
 551  *
 552  * The main purpose of this function is to read message from attached queues
 553  * and transfer message contents into CAN controller chip.
 554  * This subroutine is called by
 555  * sja1000p_irq_write_handler() for transmit events.
 556  * File: src/sja1000p.c
 557  */
 558 void sja1000p_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj)
 559 {
 560         int cmd;
 561
 562         if(obj->tx_slot){
 563                 /* Do local transmitted message distribution if enabled */
 564                 if (processlocal){
 565                         /* fill CAN message timestamp */
 566                         can_filltimestamp(&obj->tx_slot->msg.timestamp);
 567
 568                         obj->tx_slot->msg.flags |= MSG_LOCAL;
 569                         canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
 570                 }
 571                 /* Free transmitted slot */
 572                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 573                 obj->tx_slot=NULL;
 574         }
 575
 576         cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
 577         if(cmd<0)
 578                 return;
 579
 580         if (chip->chipspecops->pre_write_config(chip, obj, &obj->tx_slot->msg)) {
 581                 obj->ret = -1;
 582                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_PREP);
 583                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 584                 obj->tx_slot=NULL;
 585                 return;
 586         }
 587         if (chip->chipspecops->send_msg(chip, obj, &obj->tx_slot->msg)) {
 588                 obj->ret = -1;
 589                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_SEND);
 590                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 591                 obj->tx_slot=NULL;
 592                 return;
 593         }
 594
 595 }
 596
 597 #define MAX_RETR 10
 598
 599 /**
 600  * sja1000p_irq_handler: - interrupt service routine
 601  * @irq: interrupt vector number, this value is system specific
 602  * @dev_id: driver private pointer registered at time of request_irq() call.
 603  *      The CAN driver uses this pointer to store relationship of interrupt
 604  *      to chip state structure - @struct chip_t
 605  * @regs: system dependent value pointing to registers stored in exception frame
 606  *
 607  * Interrupt handler is activated when state of CAN controller chip changes,
 608  * there is message to be read or there is more space for new messages or
 609  * error occurs. The receive events results in reading of the message from
 610  * CAN controller chip and distribution of message through attached
 611  * message queues.
 612  * File: src/sja1000p.c
 613  */
 614 can_irqreturn_t sja1000p_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
 615 {
 616         int irq_register, status, error_code;
 617         struct chip_t *chip=(struct chip_t *)dev_id;
 618         struct msgobj_t *obj=chip->msgobj[0];
 619
 620         irq_register=can_read_reg(chip,SJAIR);
 621 //      DEBUGMSG("sja1000_irq_handler: SJAIR:%02x\n",irq_register);
 622 //      DEBUGMSG("sja1000_irq_handler: SJASR:%02x\n",
 623 //                                      can_read_reg(chip,SJASR));
 624
 625         if ((irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI)) == 0)
 626                 return CAN_IRQ_NONE;
 627
 628         if(!(chip->flags&CHIP_CONFIGURED)) {
 629                 CANMSG("sja1000p_irq_handler: called for non-configured device, irq_register 0x%02x\n", irq_register);
 630                 return CAN_IRQ_NONE;
 631         }
 632
 633         if ((irq_register & sjaIR_RI) != 0) {
 634                 DEBUGMSG("sja1000_irq_handler: RI\n");
 635                 sja1000p_read(chip,obj);
 636                 obj->ret = 0;
 637         }
 638         if ((irq_register & sjaIR_TI) != 0) {
 639                 DEBUGMSG("sja1000_irq_handler: TI\n");
 640                 obj->ret = 0;
 641                 can_msgobj_set_fl(obj,TX_REQUEST);
 642                 while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
 643                         can_msgobj_clear_fl(obj,TX_REQUEST);
 644
 645                         if (can_read_reg(chip, SJASR) & sjaSR_TBS)
 646                                 sja1000p_irq_write_handler(chip, obj);
 647
 648                         can_msgobj_clear_fl(obj,TX_LOCK);
 649                         if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
 650                         DEBUGMSG("TX looping in sja1000_irq_handler\n");
 651                 }
 652         }
 653         if ((irq_register & (sjaIR_EI|sjaIR_BEI|sjaIR_EPI|sjaIR_DOI)) != 0) {
 654                 // Some error happened
 655                 status=can_read_reg(chip,SJASR);
 656                 error_code=can_read_reg(chip,SJAECC);
 657                 CANMSG("Error: status register: 0x%x irq_register: 0x%02x error: 0x%02x\n",
 658                         status, irq_register, error_code);
 659 // FIXME: chip should be brought to usable state. Transmission cancelled if in progress.
 660 // Reset flag set to 0 if chip is already off the bus. Full state report
 661                 obj->ret=-1;
 662
 663                 if(error_code == 0xd9) {
 664                         obj->ret= -ENXIO;
 665                         /* no such device or address - no ACK received */
 666                 }
 667                 if(obj->tx_retry_cnt++>MAX_RETR) {
 668                         can_write_reg(chip, sjaCMR_AT, SJACMR); // cancel any transmition
 669                         obj->tx_retry_cnt = 0;
 670                 }
 671                 if(status&sjaSR_BS) {
 672                         CANMSG("bus-off, resetting sja1000p\n");
 673                         can_write_reg(chip, 0, SJAMOD);
 674                 }
 675
 676                 if(obj->tx_slot){
 677                         canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_BUS);
 678                         /*canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 679                         obj->tx_slot=NULL;*/
 680                 }
 681
 682         } else {
 683                 obj->tx_retry_cnt=0;
 684         }
 685
 686         return CAN_IRQ_HANDLED;
 687 }
 688
 689 /**
 690  * sja1000p_wakeup_tx: - wakeups TX processing
 691  * @chip: pointer to chip state structure
 692  * @obj: pointer to message object structure
 693  *
 694  * Function is responsible for initiating message transmition.
 695  * It is responsible for clearing of object TX_REQUEST flag
 696  *
 697  * Return Value: negative value reports error.
 698  * File: src/sja1000p.c
 699  */
 700 int sja1000p_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
 701 {
 702
 703         can_preempt_disable();
 704
 705         can_msgobj_set_fl(obj,TX_REQUEST);
 706         while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
 707                 can_msgobj_clear_fl(obj,TX_REQUEST);
 708
 709                 if (can_read_reg(chip, SJASR) & sjaSR_TBS){
 710                         obj->tx_retry_cnt=0;
 711                         sja1000p_irq_write_handler(chip, obj);
 712                 }
 713
 714                 can_msgobj_clear_fl(obj,TX_LOCK);
 715                 if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
 716                 DEBUGMSG("TX looping in sja1000p_wakeup_tx\n");
 717         }
 718
 719         can_preempt_enable();
 720         return 0;
 721 }
 722
 723 int sja1000p_register(struct chipspecops_t *chipspecops)
 724 {
 725         CANMSG("initializing sja1000p chip operations\n");
 726         chipspecops->chip_config=sja1000p_chip_config;
 727         chipspecops->baud_rate=sja1000p_baud_rate;
 728         chipspecops->standard_mask=sja1000p_standard_mask;
 729         chipspecops->extended_mask=sja1000p_extended_mask;
 730         chipspecops->message15_mask=sja1000p_extended_mask;
 731         chipspecops->clear_objects=sja1000p_clear_objects;
 732         chipspecops->config_irqs=sja1000p_config_irqs;
 733         chipspecops->pre_read_config=sja1000p_pre_read_config;
 734         chipspecops->pre_write_config=sja1000p_pre_write_config;
 735         chipspecops->send_msg=sja1000p_send_msg;
 736         chipspecops->check_tx_stat=sja1000p_check_tx_stat;
 737         chipspecops->wakeup_tx=sja1000p_wakeup_tx;
 738         chipspecops->remote_request=sja1000p_remote_request;
 739         chipspecops->enable_configuration=sja1000p_enable_configuration;
 740         chipspecops->disable_configuration=sja1000p_disable_configuration;
 741         chipspecops->set_btregs=sja1000p_set_btregs;
 742         chipspecops->start_chip=sja1000p_start_chip;
 743         chipspecops->stop_chip=sja1000p_stop_chip;
 744         chipspecops->irq_handler=sja1000p_irq_handler;
 745         return 0;
 746 }
 747
 748 /**
 749  * sja1000p_fill_chipspecops - fills chip specific operations
 750  * @chip: pointer to chip representation structure
 751  *
 752  * The function fills chip specific operations for sja1000 (PeliCAN) chip.
 753  *
 754  * Return Value: returns negative number in the case of fail
 755  */
 756 int sja1000p_fill_chipspecops(struct chip_t *chip)
 757 {
 758         chip->chip_type="sja1000p";
 759         chip->max_objects=1;
 760         sja1000p_register(chip->chipspecops);
 761         return 0;
 762 }