embedded/arch/arm/mach-lpc21xx/libs/hal/ivt.S

   1 /* Setup vector table.  Note that undf, pabt, dabt, fiq just execute
   2 a null loop. */
   3
   4 #include <bbconf_info.h>
   5
   6 .global __bbconf_magic_addr
   7 .global __bbconf_ptptr_addr
   8 .global __bbconf_pt_addr
   9
  10 .section .ivt,"ax"
  11          .code 32
  12          .align 0
  13
  14          .global hal_vectors
  15
  16 hal_vectors:    LDR     PC, Reset_Addr
  17                 LDR     PC, Undef_Addr
  18                 LDR     PC, SWI_Addr
  19                 LDR     PC, PAbt_Addr
  20                 LDR     PC, DAbt_Addr
  21                 NOP                            /* Reserved Vector */
  22 #if !defined(__thumb__)
  23                 LDR     PC, IRQ_Addr
  24 #else
  25                 B       IRQ_Trampoline
  26 #endif
  27                 LDR     PC, FIQ_Addr
  28
  29 Reset_Addr:     .word   reset_handler
  30 Undef_Addr:     .word   Undef_Handler
  31 SWI_Addr:       .word   SWI_Handler
  32 PAbt_Addr:      .word   PAbt_Handler
  33 DAbt_Addr:      .word   DAbt_Handler
  34                 .word   0                      /* Reserved Address */
  35 IRQ_Addr:       .word   irq_handler_resolver
  36 FIQ_Addr:       .word   FIQ_Handler
  37
  38 __bbconf_magic_addr:
  39         .word   BBCONF_MAGIC_VAL
  40 __bbconf_ptptr_addr:
  41         .word   __bbconf_pt_addr
  42
  43 Undef_Handler:  B       Undef_Handler
  44 SWI_Handler:    B       SWI_Handler
  45 PAbt_Handler:   B       PAbt_Handler
  46 DAbt_Handler:   B       DAbt_Handler
  47 FIQ_Handler:    B       FIQ_Handler
  48
  49 #if defined(__thumb__)
  50 IRQ_Trampoline:
  51                 sub     lr, lr, #4
  52                 push    {r0, r1, r2, r3, r4, ip, lr}
  53                 ldr     r1, IRQ_Addr
  54                 adr     lr, IRQ_Trampoline_ret
  55                 tst     r1,#1
  56                 adrne   lr, IRQ_Trampoline_ret_thumb+1
  57                 bx      r1
  58 IRQ_Trampoline_ret_thumb:
  59          .code 16
  60                 bx      pc
  61                 nop
  62          .code 32
  63 IRQ_Trampoline_ret:
  64                 ldm     sp!, {r0, r1, r2, r3, r4, ip, pc}^
  65 #endif
  66
  67         .end