1 /******************************************************************************
6 * This module provides the interface definitions for setting up and
7 * controlling the various interrupt modes present on the ARM processor.
8 * Copyright 2004, R O SoftWare
9 * No guarantees, warrantees, or promises, implied or otherwise.
10 * May be used for hobby or commercial purposes provided copyright
11 * notice remains intact.
13 *****************************************************************************/
17 /******************************************************************************
19 * MACRO Name: ISR_ENTRY()
22 * This MACRO is used upon entry to an ISR. The current version of
23 * the gcc compiler for ARM does not produce correct code for
24 * interrupt routines to operate properly with THUMB code. The MACRO
25 * performs the following steps:
27 * 1 - Adjust address at which execution should resume after servicing
28 * ISR to compensate for IRQ entry
29 * 2 - Save the non-banked registers r0-r12 and lr onto the IRQ stack.
30 * 3 - Get the status of the interrupted program is in SPSR.
31 * 4 - Push it onto the IRQ stack as well.
33 *****************************************************************************/
34 #define ISR_ENTRY() asm volatile(" sub lr, lr,#4\n" \
35 " stmfd sp!,{r0-r12,lr}\n" \
39 /******************************************************************************
41 * MACRO Name: ISR_EXIT()
44 * This MACRO is used to exit an ISR. The current version of the gcc
45 * compiler for ARM does not produce correct code for interrupt
46 * routines to operate properly with THUMB code. The MACRO performs
47 * the following steps:
49 * 1 - Recover SPSR value from stack
50 * 2 - and restore its value
51 * 3 - Pop the return address & the saved general registers from
52 * the IRQ stack & return
54 *****************************************************************************/
55 #define ISR_EXIT() asm volatile(" ldmfd sp!,{r1}\n" \
57 " ldmfd sp!,{r0-r12,pc}^")
59 /******************************************************************************
61 * Function Name: disableIRQ()
64 * This function sets the IRQ disable bit in the status register
70 * previous value of CPSR
72 *****************************************************************************/
73 unsigned disableIRQ(void);
75 /******************************************************************************
77 * Function Name: enableIRQ()
80 * This function clears the IRQ disable bit in the status register
86 * previous value of CPSR
88 *****************************************************************************/
89 unsigned enableIRQ(void);
91 /******************************************************************************
93 * Function Name: restoreIRQ()
96 * This function restores the IRQ disable bit in the status register
97 * to the value contained within passed oldCPSR
103 * previous value of CPSR
105 *****************************************************************************/
106 unsigned restoreIRQ(unsigned oldCPSR);
108 /******************************************************************************
110 * Function Name: disableFIQ()
113 * This function sets the FIQ disable bit in the status register
119 * previous value of CPSR
121 *****************************************************************************/
122 unsigned disableFIQ(void);
124 /******************************************************************************
126 * Function Name: enableFIQ()
129 * This function clears the FIQ disable bit in the status register
135 * previous value of CPSR
137 *****************************************************************************/
138 unsigned enableFIQ(void);
140 /******************************************************************************
142 * Function Name: restoreIRQ()
145 * This function restores the FIQ disable bit in the status register
146 * to the value contained within passed oldCPSR
152 * previous value of CPSR
154 *****************************************************************************/
155 unsigned restoreFIQ(unsigned oldCPSR);