216a9b904b8f755c8a5c4a91795c1489c3f1629d
[lincan.git] / lincan / src / sja1000p.c
1 /* sja1000.c
2  * Linux CAN-bus device driver.
3  * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4  * Changed for PeliCan mode SJA1000 by Tomasz Motylewski (BFAD GmbH)
5  * T.Motylewski@bfad.de
6  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
7  * email:pisa@cmp.felk.cvut.cz
8  * This software is released under the GPL-License.
9  * Version lincan-0.3  17 Jun 2004
10  */
11
12 #include "../include/can.h"
13 #include "../include/can_sysdep.h"
14 #include "../include/main.h"
15 #include "../include/sja1000p.h"
16
17 /**
18  * sja1000p_enable_configuration - enable chip configuration mode
19  * @chip: pointer to chip state structure
20  */
21 int sja1000p_enable_configuration(struct canchip_t *chip)
22 {
23         int i=0;
24         enum sja1000_PeliCAN_MOD flags;
25
26         can_disable_irq(chip->chip_irq);
27
28         flags=can_read_reg(chip,SJAMOD);
29
30         while ((!(flags & sjaMOD_RM)) && (i<=10)) {
31                 can_write_reg(chip, sjaMOD_RM, SJAMOD);
32 // TODO: configurable sjaMOD_AFM (32/16 bit acceptance filter)
33 // config sjaMOD_LOM (listen only)
34                 udelay(100);
35                 i++;
36                 flags=can_read_reg(chip, SJAMOD);
37         }
38         if (i>=10) {
39                 CANMSG("Reset error\n");
40                 can_enable_irq(chip->chip_irq);
41                 return -ENODEV;
42         }
43
44         return 0;
45 }
46
47 /**
48  * sja1000p_disable_configuration - disable chip configuration mode
49  * @chip: pointer to chip state structure
50  */
51 int sja1000p_disable_configuration(struct canchip_t *chip)
52 {
53         int i=0;
54         enum sja1000_PeliCAN_MOD flags;
55
56         flags=can_read_reg(chip,SJAMOD);
57
58         while ( (flags & sjaMOD_RM) && (i<=50) ) {
59 // could be as long as 11*128 bit times after buss-off
60                 can_write_reg(chip, 0, SJAMOD);
61 // TODO: configurable sjaMOD_AFM (32/16 bit acceptance filter)
62 // config sjaMOD_LOM (listen only)
63                 udelay(100);
64                 i++;
65                 flags=can_read_reg(chip, SJAMOD);
66         }
67         if (i>=10) {
68                 CANMSG("Error leaving reset status\n");
69                 return -ENODEV;
70         }
71
72         can_enable_irq(chip->chip_irq);
73
74         return 0;
75 }
76
77 /**
78  * sja1000p_chip_config: - can chip configuration
79  * @chip: pointer to chip state structure
80  *
81  * This function configures chip and prepares it for message
82  * transmission and reception. The function resets chip,
83  * resets mask for acceptance of all messages by call to
84  * sja1000p_extended_mask() function and then 
85  * computes and sets baudrate with use of function sja1000p_baud_rate().
86  * Return Value: negative value reports error.
87  * File: src/sja1000p.c
88  */
89 int sja1000p_chip_config(struct canchip_t *chip)
90 {
91         int i;
92         unsigned char n, r;
93         
94         if (sja1000p_enable_configuration(chip))
95                 return -ENODEV;
96
97         /* Set mode, clock out, comparator */
98         can_write_reg(chip,sjaCDR_PELICAN|chip->sja_cdr_reg,SJACDR); 
99         /* Set driver output configuration */
100         can_write_reg(chip,chip->sja_ocr_reg,SJAOCR); 
101         
102         /* Simple check for chip presence */
103         for (i=0, n=0x5a; i<8; i++, n+=0xf) {
104                 can_write_reg(chip,n,SJAACR0+i);
105         }
106         for (i=0, n=0x5a; i<8; i++, n+=0xf) {
107                 r = n^can_read_reg(chip,SJAACR0+i);
108                 if (r) {
109                         CANMSG("sja1000p_chip_config: chip connection broken,"
110                                 " readback differ 0x%02x\n", r);
111                         return -ENODEV;
112                 }
113         }
114         
115
116         if (sja1000p_extended_mask(chip,0x00000000, 0xffffffff))
117                 return -ENODEV;
118         
119         if (!chip->baudrate)
120                 chip->baudrate=1000000;
121         if (sja1000p_baud_rate(chip,chip->baudrate,chip->clock,0,75,0))
122                 return -ENODEV;
123
124         /* Enable hardware interrupts */
125         can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER); 
126
127         sja1000p_disable_configuration(chip);
128         
129         return 0;
130 }
131
132 /**
133  * sja1000p_extended_mask: - setup of extended mask for message filtering
134  * @chip: pointer to chip state structure
135  * @code: can message acceptance code
136  * @mask: can message acceptance mask
137  *
138  * Return Value: negative value reports error.
139  * File: src/sja1000p.c
140  */
141 int sja1000p_extended_mask(struct canchip_t *chip, unsigned long code, unsigned  long mask)
142 {
143         int i;
144
145         if (sja1000p_enable_configuration(chip))
146                 return -ENODEV;
147
148 // LSB to +3, MSB to +0 
149         for(i=SJA_PeliCAN_AC_LEN; --i>=0;) {
150                 can_write_reg(chip,code&0xff,SJAACR0+i);
151                 can_write_reg(chip,mask&0xff,SJAAMR0+i);
152                 code >>= 8;
153                 mask >>= 8;
154         }
155
156         DEBUGMSG("Setting acceptance code to 0x%lx\n",(unsigned long)code);
157         DEBUGMSG("Setting acceptance mask to 0x%lx\n",(unsigned long)mask);
158
159         sja1000p_disable_configuration(chip);
160
161         return 0;
162 }
163
164 /**
165  * sja1000p_baud_rate: - set communication parameters.
166  * @chip: pointer to chip state structure
167  * @rate: baud rate in Hz
168  * @clock: frequency of sja1000 clock in Hz (ISA osc is 14318000)
169  * @sjw: synchronization jump width (0-3) prescaled clock cycles
170  * @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio
171  * @flags: fields %BTR1_SAM, %OCMODE, %OCPOL, %OCTP, %OCTN, %CLK_OFF, %CBP
172  *
173  * Return Value: negative value reports error.
174  * File: src/sja1000p.c
175  */
176 int sja1000p_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
177                                                         int sampl_pt, int flags)
178 {
179         int best_error = 1000000000, error;
180         int best_tseg=0, best_brp=0, best_rate=0, brp=0;
181         int tseg=0, tseg1=0, tseg2=0;
182         
183         if (sja1000p_enable_configuration(chip))
184                 return -ENODEV;
185
186         clock /=2;
187
188         /* tseg even = round down, odd = round up */
189         for (tseg=(0+0+2)*2; tseg<=(sjaMAX_TSEG2+sjaMAX_TSEG1+2)*2+1; tseg++) {
190                 brp = clock/((1+tseg/2)*rate)+tseg%2;
191                 if (brp == 0 || brp > 64)
192                         continue;
193                 error = rate - clock/(brp*(1+tseg/2));
194                 if (error < 0)
195                         error = -error;
196                 if (error <= best_error) {
197                         best_error = error;
198                         best_tseg = tseg/2;
199                         best_brp = brp-1;
200                         best_rate = clock/(brp*(1+tseg/2));
201                 }
202         }
203         if (best_error && (rate/best_error < 10)) {
204                 CANMSG("baud rate %d is not possible with %d Hz clock\n",
205                                                                 rate, 2*clock);
206                 CANMSG("%d bps. brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d\n",
207                                 best_rate, best_brp, best_tseg, tseg1, tseg2);
208                 return -EINVAL;
209         }
210         tseg2 = best_tseg-(sampl_pt*(best_tseg+1))/100;
211         if (tseg2 < 0)
212                 tseg2 = 0;
213         if (tseg2 > sjaMAX_TSEG2)
214                 tseg2 = sjaMAX_TSEG2;
215         tseg1 = best_tseg-tseg2-2;
216         if (tseg1>sjaMAX_TSEG1) {
217                 tseg1 = sjaMAX_TSEG1;
218                 tseg2 = best_tseg-tseg1-2;
219         }
220
221         DEBUGMSG("Setting %d bps.\n", best_rate);
222         DEBUGMSG("brp=%d, best_tseg=%d, tseg1=%d, tseg2=%d, sampl_pt=%d\n",
223                                         best_brp, best_tseg, tseg1, tseg2,
224                                         (100*(best_tseg-tseg2)/(best_tseg+1)));
225
226
227         can_write_reg(chip, sjw<<6 | best_brp, SJABTR0);
228         can_write_reg(chip, ((flags & BTR1_SAM) != 0)<<7 | (tseg2<<4) 
229                                         | tseg1, SJABTR1);
230
231         sja1000p_disable_configuration(chip);
232
233         return 0;
234 }
235
236 /**
237  * sja1000p_read: - reads and distributes one or more received messages
238  * @chip: pointer to chip state structure
239  * @obj: pinter to CAN message queue information
240  *
241  * File: src/sja1000p.c
242  */
243 void sja1000p_read(struct canchip_t *chip, struct msgobj_t *obj) {
244         int i, flags, len, datastart;
245         do {
246                 flags = can_read_reg(chip,SJAFRM);
247                 if(flags&sjaFRM_FF) {
248                         obj->rx_msg.id =
249                                 (can_read_reg(chip,SJAID0)<<21) +
250                                 (can_read_reg(chip,SJAID1)<<13) +
251                                 (can_read_reg(chip,SJAID2)<<5) +
252                                 (can_read_reg(chip,SJAID3)>>3);
253                         datastart = SJADATE;
254                 } else {
255                         obj->rx_msg.id =
256                                 (can_read_reg(chip,SJAID0)<<3) +
257                                 (can_read_reg(chip,SJAID1)>>5);
258                         datastart = SJADATS;
259                 }
260                 obj->rx_msg.flags =
261                         ((flags & sjaFRM_RTR) ? MSG_RTR : 0) |
262                         ((flags & sjaFRM_FF) ? MSG_EXT : 0);
263                 len = flags & sjaFRM_DLC_M;
264                 obj->rx_msg.length = len;
265                 if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
266                 for(i=0; i< len; i++) {
267                         obj->rx_msg.data[i]=can_read_reg(chip,datastart+i);
268                 }
269
270                 /* fill CAN message timestamp */
271                 can_filltimestamp(&obj->rx_msg.timestamp);
272
273                 canque_filter_msg2edges(obj->qends, &obj->rx_msg);
274
275                 can_write_reg(chip, sjaCMR_RRB, SJACMR);
276
277         } while (can_read_reg(chip, SJASR) & sjaSR_RBS);
278 }
279
280 /**
281  * sja1000p_pre_read_config: - prepares message object for message reception
282  * @chip: pointer to chip state structure
283  * @obj: pointer to message object state structure
284  *
285  * Return Value: negative value reports error.
286  *      Positive value indicates immediate reception of message.
287  * File: src/sja1000p.c
288  */
289 int sja1000p_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj)
290 {
291         int status;
292         status=can_read_reg(chip,SJASR);
293         
294         if(status  & sjaSR_BS) {
295                 /* Try to recover from error condition */
296                 DEBUGMSG("sja1000p_pre_read_config bus-off recover 0x%x\n",status);
297                 sja1000p_enable_configuration(chip);
298                 can_write_reg(chip, 0, SJARXERR);
299                 can_write_reg(chip, 0, SJATXERR1);
300                 can_read_reg(chip, SJAECC);
301                 sja1000p_disable_configuration(chip);
302         }
303
304         if (!(status&sjaSR_RBS)) {
305                 return 0;
306         }
307
308         can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER); //disable interrupts for a moment
309         sja1000p_read(chip, obj);
310         can_write_reg(chip, sjaENABLE_INTERRUPTS, SJAIER); //enable interrupts
311         return 1;
312 }
313
314 #define MAX_TRANSMIT_WAIT_LOOPS 10
315 /**
316  * sja1000p_pre_write_config: - prepares message object for message transmission
317  * @chip: pointer to chip state structure
318  * @obj: pointer to message object state structure
319  * @msg: pointer to CAN message
320  *
321  * This function prepares selected message object for future initiation
322  * of message transmission by sja1000p_send_msg() function.
323  * The CAN message data and message ID are transfered from @msg slot
324  * into chip buffer in this function.
325  * Return Value: negative value reports error.
326  * File: src/sja1000p.c
327  */
328 int sja1000p_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj, 
329                                                         struct canmsg_t *msg)
330 {
331         int i=0; 
332         unsigned int id;
333         int status;
334         int len;
335
336         /* Wait until Transmit Buffer Status is released */
337         while ( !((status=can_read_reg(chip, SJASR)) & sjaSR_TBS) && 
338                                                 i++<MAX_TRANSMIT_WAIT_LOOPS) {
339                 udelay(i);
340         }
341         
342         if(status & sjaSR_BS) {
343                 /* Try to recover from error condition */
344                 DEBUGMSG("sja1000p_pre_write_config bus-off recover 0x%x\n",status);
345                 sja1000p_enable_configuration(chip);
346                 can_write_reg(chip, 0, SJARXERR);
347                 can_write_reg(chip, 0, SJATXERR1);
348                 can_read_reg(chip, SJAECC);
349                 sja1000p_disable_configuration(chip);
350         }
351         if (!(can_read_reg(chip, SJASR) & sjaSR_TBS)) {
352                 CANMSG("Transmit timed out, cancelling\n");
353 // here we should check if there is no write/select waiting for this
354 // transmit. If so, set error ret and wake up.
355 // CHECKME: if we do not disable sjaIER_TIE (TX IRQ) here we get interrupt
356 // immediately
357                 can_write_reg(chip, sjaCMR_AT, SJACMR);
358                 i=0;
359                 while ( !(can_read_reg(chip, SJASR) & sjaSR_TBS) &&
360                                                 i++<MAX_TRANSMIT_WAIT_LOOPS) {
361                         udelay(i);
362                 }
363                 if (!(can_read_reg(chip, SJASR) & sjaSR_TBS)) {
364                         CANMSG("Could not cancel, please reset\n");
365                         return -EIO;
366                 }
367         }
368         len = msg->length;
369         if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
370         /* len &= sjaFRM_DLC_M; ensured by above condition already */
371         can_write_reg(chip, ((msg->flags&MSG_EXT)?sjaFRM_FF:0) |
372                 ((msg->flags & MSG_RTR) ? sjaFRM_RTR : 0) | len, SJAFRM);
373         if(msg->flags&MSG_EXT) {
374                 id=msg->id<<3;
375                 can_write_reg(chip, id & 0xff, SJAID3);
376                 id >>= 8;
377                 can_write_reg(chip, id & 0xff, SJAID2);
378                 id >>= 8;
379                 can_write_reg(chip, id & 0xff, SJAID1);
380                 id >>= 8;
381                 can_write_reg(chip, id, SJAID0);
382                 for(i=0; i < len; i++) {
383                         can_write_reg(chip, msg->data[i], SJADATE+i);
384                 }
385         } else {
386                 id=msg->id<<5;
387                 can_write_reg(chip, (id >> 8) & 0xff, SJAID0);
388                 can_write_reg(chip, id & 0xff, SJAID1);
389                 for(i=0; i < len; i++) {
390                         can_write_reg(chip, msg->data[i], SJADATS+i);
391                 }
392         }
393         return 0;
394 }
395
396 /**
397  * sja1000p_send_msg: - initiate message transmission
398  * @chip: pointer to chip state structure
399  * @obj: pointer to message object state structure
400  * @msg: pointer to CAN message
401  *
402  * This function is called after sja1000p_pre_write_config() function,
403  * which prepares data in chip buffer.
404  * Return Value: negative value reports error.
405  * File: src/sja1000p.c
406  */
407 int sja1000p_send_msg(struct canchip_t *chip, struct msgobj_t *obj, 
408                                                         struct canmsg_t *msg)
409 {
410         can_write_reg(chip, sjaCMR_TR, SJACMR);
411
412         return 0;
413 }
414
415 /**
416  * sja1000p_check_tx_stat: - checks state of transmission engine
417  * @chip: pointer to chip state structure
418  *
419  * Return Value: negative value reports error.
420  *      Positive return value indicates transmission under way status.
421  *      Zero value indicates finishing of all issued transmission requests.
422  * File: src/sja1000p.c
423  */
424 int sja1000p_check_tx_stat(struct canchip_t *chip)
425 {
426         if (can_read_reg(chip,SJASR) & sjaSR_TCS)
427                 return 0;
428         else
429                 return 1;
430 }
431
432 /**
433  * sja1000p_set_btregs: -  configures bitrate registers
434  * @chip: pointer to chip state structure
435  * @btr0: bitrate register 0
436  * @btr1: bitrate register 1
437  *
438  * Return Value: negative value reports error.
439  * File: src/sja1000p.c
440  */
441 int sja1000p_set_btregs(struct canchip_t *chip, unsigned short btr0, 
442                                                         unsigned short btr1)
443 {
444         if (sja1000p_enable_configuration(chip))
445                 return -ENODEV;
446
447         can_write_reg(chip, btr0, SJABTR0);
448         can_write_reg(chip, btr1, SJABTR1);
449
450         sja1000p_disable_configuration(chip);
451
452         return 0;
453 }
454
455 /**
456  * sja1000p_start_chip: -  starts chip message processing
457  * @chip: pointer to chip state structure
458  *
459  * Return Value: negative value reports error.
460  * File: src/sja1000p.c
461  */
462 int sja1000p_start_chip(struct canchip_t *chip)
463 {
464         enum sja1000_PeliCAN_MOD flags;
465
466         flags = can_read_reg(chip, SJAMOD) & (sjaMOD_LOM|sjaMOD_STM|sjaMOD_AFM|sjaMOD_SM);
467         can_write_reg(chip, flags, SJAMOD);
468
469         return 0;
470 }
471
472 /**
473  * sja1000p_stop_chip: -  stops chip message processing
474  * @chip: pointer to chip state structure
475  *
476  * Return Value: negative value reports error.
477  * File: src/sja1000p.c
478  */
479 int sja1000p_stop_chip(struct canchip_t *chip)
480 {
481         enum sja1000_PeliCAN_MOD flags;
482
483         flags = can_read_reg(chip, SJAMOD) & (sjaMOD_LOM|sjaMOD_STM|sjaMOD_AFM|sjaMOD_SM);
484         can_write_reg(chip, flags|sjaMOD_RM, SJAMOD);
485
486         return 0;
487 }
488
489 /**
490  * sja1000p_attach_to_chip: - attaches to the chip, setups registers and state
491  * @chip: pointer to chip state structure
492  *
493  * Return Value: negative value reports error.
494  * File: src/sja1000p.c
495  */
496 int sja1000p_attach_to_chip(struct canchip_t *chip)
497 {
498         return 0;
499 }
500
501 /**
502  * sja1000p_release_chip: - called before chip structure removal if %CHIP_ATTACHED is set
503  * @chip: pointer to chip state structure
504  *
505  * Return Value: negative value reports error.
506  * File: src/sja1000p.c
507  */
508 int sja1000p_release_chip(struct canchip_t *chip)
509 {
510         sja1000p_stop_chip(chip);
511         can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER);
512
513         return 0;
514 }
515
516 /**
517  * sja1000p_remote_request: - configures message object and asks for RTR message
518  * @chip: pointer to chip state structure
519  * @obj: pointer to message object structure
520  *
521  * Return Value: negative value reports error.
522  * File: src/sja1000p.c
523  */
524 int sja1000p_remote_request(struct canchip_t *chip, struct msgobj_t *obj)
525 {
526         CANMSG("sja1000p_remote_request not implemented\n");
527         return -ENOSYS;
528 }
529
530 /**
531  * sja1000p_standard_mask: - setup of mask for message filtering
532  * @chip: pointer to chip state structure
533  * @code: can message acceptance code
534  * @mask: can message acceptance mask
535  *
536  * Return Value: negative value reports error.
537  * File: src/sja1000p.c
538  */
539 int sja1000p_standard_mask(struct canchip_t *chip, unsigned short code,
540                 unsigned short mask)
541 {
542         CANMSG("sja1000p_standard_mask not implemented\n");
543         return -ENOSYS;
544 }
545
546 /**
547  * sja1000p_clear_objects: - clears state of all message object residing in chip
548  * @chip: pointer to chip state structure
549  *
550  * Return Value: negative value reports error.
551  * File: src/sja1000p.c
552  */
553 int sja1000p_clear_objects(struct canchip_t *chip)
554 {
555         CANMSG("sja1000p_clear_objects not implemented\n");
556         return -ENOSYS;
557 }
558
559 /**
560  * sja1000p_config_irqs: - tunes chip hardware interrupt delivery
561  * @chip: pointer to chip state structure
562  * @irqs: requested chip IRQ configuration
563  *
564  * Return Value: negative value reports error.
565  * File: src/sja1000p.c
566  */
567 int sja1000p_config_irqs(struct canchip_t *chip, short irqs)
568 {
569         CANMSG("sja1000p_config_irqs not implemented\n");
570         return -ENOSYS;
571 }
572
573 /**
574  * sja1000p_irq_write_handler: - part of ISR code responsible for transmit events
575  * @chip: pointer to chip state structure
576  * @obj: pointer to attached queue description
577  *
578  * The main purpose of this function is to read message from attached queues
579  * and transfer message contents into CAN controller chip.
580  * This subroutine is called by
581  * sja1000p_irq_write_handler() for transmit events.
582  * File: src/sja1000p.c
583  */
584 void sja1000p_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
585 {
586         int cmd;
587         
588         if(obj->tx_slot){
589                 /* Do local transmitted message distribution if enabled */
590                 if (processlocal){
591                         /* fill CAN message timestamp */
592                         can_filltimestamp(&obj->tx_slot->msg.timestamp);
593                         
594                         obj->tx_slot->msg.flags |= MSG_LOCAL;
595                         canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
596                 }
597                 /* Free transmitted slot */
598                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
599                 obj->tx_slot=NULL;
600         }
601         
602         cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
603         if(cmd<0)
604                 return;
605
606         if (chip->chipspecops->pre_write_config(chip, obj, &obj->tx_slot->msg)) {
607                 obj->ret = -1;
608                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_PREP);
609                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
610                 obj->tx_slot=NULL;
611                 return;
612         }
613         if (chip->chipspecops->send_msg(chip, obj, &obj->tx_slot->msg)) {
614                 obj->ret = -1;
615                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_SEND);
616                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
617                 obj->tx_slot=NULL;
618                 return;
619         }
620
621 }
622
623 #define MAX_RETR 10
624
625 /**
626  * sja1000p_irq_handler: - interrupt service routine
627  * @irq: interrupt vector number, this value is system specific
628  * @chip: pointer to chip state structure
629  * 
630  * Interrupt handler is activated when state of CAN controller chip changes,
631  * there is message to be read or there is more space for new messages or
632  * error occurs. The receive events results in reading of the message from
633  * CAN controller chip and distribution of message through attached
634  * message queues.
635  * File: src/sja1000p.c
636  */
637 int sja1000p_irq_handler(int irq, struct canchip_t *chip)
638 {
639         int irq_register, status, error_code;
640         struct msgobj_t *obj=chip->msgobj[0];
641         int loop_cnt=CHIP_MAX_IRQLOOP;
642
643         irq_register=can_read_reg(chip,SJAIR);
644 //      DEBUGMSG("sja1000_irq_handler: SJAIR:%02x\n",irq_register);
645 //      DEBUGMSG("sja1000_irq_handler: SJASR:%02x\n",
646 //                                      can_read_reg(chip,SJASR));
647
648         if ((irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI)) == 0)
649                 return CANCHIP_IRQ_NONE;
650
651         if(!(chip->flags&CHIP_CONFIGURED)) {
652                 CANMSG("sja1000p_irq_handler: called for non-configured device, irq_register 0x%02x\n", irq_register);
653                 return CANCHIP_IRQ_NONE;
654         }
655
656         do {
657
658                 if(!loop_cnt--) {
659                         CANMSG("sja1000p_irq_handler IRQ %d stuck\n",irq);
660                         return CANCHIP_IRQ_STUCK;
661                 }
662
663                 if ((irq_register & sjaIR_RI) != 0) {
664                         DEBUGMSG("sja1000_irq_handler: RI\n");
665                         sja1000p_read(chip,obj);
666                         obj->ret = 0;
667                 }
668                 if ((irq_register & sjaIR_TI) != 0) {
669                         DEBUGMSG("sja1000_irq_handler: TI\n");
670                         obj->ret = 0;
671                         can_msgobj_set_fl(obj,TX_REQUEST);
672                         while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
673                                 can_msgobj_clear_fl(obj,TX_REQUEST);
674
675                                 if (can_read_reg(chip, SJASR) & sjaSR_TBS)
676                                         sja1000p_irq_write_handler(chip, obj);
677
678                                 can_msgobj_clear_fl(obj,TX_LOCK);
679                                 if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
680                                 DEBUGMSG("TX looping in sja1000_irq_handler\n");
681                         }
682                 }
683                 if ((irq_register & (sjaIR_EI|sjaIR_BEI|sjaIR_EPI|sjaIR_DOI)) != 0) { 
684                         // Some error happened
685                         status=can_read_reg(chip,SJASR);
686                         error_code=can_read_reg(chip,SJAECC);
687                         CANMSG("Error: status register: 0x%x irq_register: 0x%02x error: 0x%02x\n",
688                                 status, irq_register, error_code);
689 // FIXME: chip should be brought to usable state. Transmission cancelled if in progress.
690 // Reset flag set to 0 if chip is already off the bus. Full state report
691                 obj->ret=-1;
692                 
693                         if(error_code == 0xd9) {
694                                 obj->ret= -ENXIO;
695                                 /* no such device or address - no ACK received */
696                         }
697                         if(obj->tx_retry_cnt++>MAX_RETR) {
698                                 can_write_reg(chip, sjaCMR_AT, SJACMR); // cancel any transmition
699                                 obj->tx_retry_cnt = 0;
700                         }
701                         if(status&sjaSR_BS) {
702                                 CANMSG("bus-off, resetting sja1000p\n");
703                                 can_write_reg(chip, 0, SJAMOD);
704                         }
705
706                         if(obj->tx_slot){
707                                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_BUS);
708                                 /*canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
709                                 obj->tx_slot=NULL;*/
710                         }
711
712                 } else {
713                         obj->tx_retry_cnt=0;
714                 }
715
716                 irq_register=can_read_reg(chip,SJAIR);
717         
718         } while(irq_register & (sjaIR_BEI|sjaIR_EPI|sjaIR_DOI|sjaIR_EI|sjaIR_TI|sjaIR_RI));
719
720         return CANCHIP_IRQ_HANDLED;
721 }
722
723 /**
724  * sja1000p_wakeup_tx: - wakeups TX processing
725  * @chip: pointer to chip state structure
726  * @obj: pointer to message object structure
727  *
728  * Function is responsible for initiating message transmition.
729  * It is responsible for clearing of object TX_REQUEST flag
730  *
731  * Return Value: negative value reports error.
732  * File: src/sja1000p.c
733  */
734 int sja1000p_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
735 {
736         
737         can_preempt_disable();
738         
739         can_msgobj_set_fl(obj,TX_REQUEST);
740         while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
741                 can_msgobj_clear_fl(obj,TX_REQUEST);
742
743                 if (can_read_reg(chip, SJASR) & sjaSR_TBS){
744                         obj->tx_retry_cnt=0;
745                         sja1000p_irq_write_handler(chip, obj);
746                 }
747         
748                 can_msgobj_clear_fl(obj,TX_LOCK);
749                 if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
750                 DEBUGMSG("TX looping in sja1000p_wakeup_tx\n");
751         }
752
753         can_preempt_enable();
754         return 0;
755 }
756
757 int sja1000p_register(struct chipspecops_t *chipspecops)
758 {
759         CANMSG("initializing sja1000p chip operations\n");
760         chipspecops->chip_config=sja1000p_chip_config;
761         chipspecops->baud_rate=sja1000p_baud_rate;
762         chipspecops->standard_mask=sja1000p_standard_mask;
763         chipspecops->extended_mask=sja1000p_extended_mask;
764         chipspecops->message15_mask=sja1000p_extended_mask;
765         chipspecops->clear_objects=sja1000p_clear_objects;
766         chipspecops->config_irqs=sja1000p_config_irqs;
767         chipspecops->pre_read_config=sja1000p_pre_read_config;
768         chipspecops->pre_write_config=sja1000p_pre_write_config;
769         chipspecops->send_msg=sja1000p_send_msg;
770         chipspecops->check_tx_stat=sja1000p_check_tx_stat;
771         chipspecops->wakeup_tx=sja1000p_wakeup_tx;
772         chipspecops->remote_request=sja1000p_remote_request;
773         chipspecops->enable_configuration=sja1000p_enable_configuration;
774         chipspecops->disable_configuration=sja1000p_disable_configuration;
775         chipspecops->attach_to_chip=sja1000p_attach_to_chip;
776         chipspecops->release_chip=sja1000p_release_chip;
777         chipspecops->set_btregs=sja1000p_set_btregs;
778         chipspecops->start_chip=sja1000p_start_chip;
779         chipspecops->stop_chip=sja1000p_stop_chip;
780         chipspecops->irq_handler=sja1000p_irq_handler;
781         chipspecops->irq_accept=NULL;
782         return 0;
783 }
784
785 /**
786  * sja1000p_fill_chipspecops - fills chip specific operations
787  * @chip: pointer to chip representation structure
788  *
789  * The function fills chip specific operations for sja1000 (PeliCAN) chip.
790  *
791  * Return Value: returns negative number in the case of fail
792  */
793 int sja1000p_fill_chipspecops(struct canchip_t *chip)
794 {
795         chip->chip_type="sja1000p";
796         chip->max_objects=1;
797         sja1000p_register(chip->chipspecops);
798         return 0;
799 }