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1 /* pip.c
2  * Linux CAN-bus device driver.
3  * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4  * This software is released under the GPL-License.
5  * Version 0.7  6 Aug 2001
6  */ 
7
8 #include <linux/autoconf.h>
9 #if defined (CONFIG_MODVERSIONS) && !defined (MODVERSIONS)
10 #define MODVERSIONS
11 #endif
12
13 #if defined (MODVERSIONS)
14 #include <linux/modversions.h>
15 #endif
16
17 #include <linux/ioport.h>
18 #include <linux/delay.h>
19 #include <asm/errno.h>
20 #include <asm/io.h>
21
22 #include "../include/main.h"
23 #include "../include/pip.h"
24 #include "../include/i82527.h"
25
26 int pip5_request_io(unsigned long io_addr)
27 {
28         if (io_addr != 0x8000) {
29                 CANMSG("Invalid base io address\n");
30                 CANMSG("The PIP5 uses a fixed base address of 0x8000,\n");
31                 CANMSG("please consult your user manual.\n");
32                 return -ENODEV;
33         }
34         if (check_region(io_addr,0x100)) {
35                 CANMSG("Unable to open port: 0x%lx\n",io_addr);
36                 return -ENODEV;
37         }
38         else if(check_region(io_addr+0x102,0x01)) {
39                 CANMSG("Unable to open port: 0x%lx\n",io_addr+0x102);
40                 return -ENODEV;
41         }
42         else {
43                 request_region(io_addr,0x100,DEVICE_NAME);
44                 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", io_addr, io_addr + 0x100 - 1);
45                 request_region(io_addr+0x102,0x01,DEVICE_NAME);
46                 DEBUGMSG("Registered IO-memory: 0x%lx\n", io_addr+0x102);
47         }
48         return 0;
49 }
50
51 int pip6_request_io(unsigned long io_addr)
52 {
53         if ( (io_addr != 0x1000)&&(io_addr != 0x8000)&&(io_addr != 0xe000)) {
54                 CANMSG("Invalid base io address\n");
55                 CANMSG("Valid values for the PIP6 are: 0x1000, 0x8000 or 0xe000\n");
56                 CANMSG("Please consult your user manual.\n");
57                 return -ENODEV;
58         }
59         if (check_region(io_addr,0x100)) {
60                 CANMSG("Unable to open port: 0x%lx\n",io_addr);
61                 return -ENODEV;
62         }
63         else if (check_region(0x804, 0x02)) {
64                 CANMSG("Unable to open port: 0x%x\n", 0x804);
65                 return -ENODEV;
66         }
67         else {
68                 request_region(io_addr,0x100, DEVICE_NAME);
69                 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", io_addr, io_addr + 0x100 -1);
70                 request_region(0x804,0x02,DEVICE_NAME);
71                 DEBUGMSG("Registered IO-memory : 0x%x - 0x%x\n",0x804,0x805);
72         }
73         return 0;
74 }
75
76 int pip5_release_io(unsigned long io_addr)
77 {
78         release_region(io_addr,0x100);
79         release_region(io_addr+0x102,0x01);
80
81         return 0;
82 }
83
84 int pip6_release_io(unsigned long io_addr)
85 {
86         release_region(io_addr,0x100);
87         release_region(0x804,0x02);
88
89         return 0;
90 }
91
92 int pip_reset(int card)
93 {
94         int i=0, res_value=0;
95
96         DEBUGMSG("Resetting %s hardware ...\n", candevices_p[card]->hwname);
97         if (!strcmp(candevices_p[card]->hwname,"pip5"))
98                 res_value = 0xcf;
99         else
100                 res_value = 0x01;
101         while (i < 1000000) {
102                 i++;
103                 outb(res_value,candevices_p[card]->res_addr);
104         }
105         outb(0x0,candevices_p[card]->res_addr);
106
107         /* Check hardware reset status */
108         i=0;
109         while ( (inb(candevices_p[card]->io_addr+iCPU) & iCPU_RST) && (i<=15)) {
110                 udelay(20000);
111                 i++;
112         }
113         if (i>=15) {
114                 CANMSG("Reset status timeout!\n");
115                 CANMSG("Please check your hardware.\n");
116                 return -ENODEV;
117         }
118         else
119                 DEBUGMSG("Chip0 reset status ok.\n");
120         
121
122         return 0;
123 }
124
125 int pip_init_hw_data(int card) 
126 {
127         if (!strcmp(candevices_p[card]->hwname,"pip5"))
128                 candevices_p[card]->res_addr=candevices_p[card]->io_addr+0x102;
129         else
130                 candevices_p[card]->res_addr=0x805;
131         candevices_p[card]->nr_82527_chips=1;
132         candevices_p[card]->nr_sja1000_chips=0;
133         candevices_p[card]->flags |= PROGRAMMABLE_IRQ;
134
135         return 0;
136 }
137
138 int pip_init_chip_data(int card, int chipnr)
139 {
140         candevices_p[card]->chip[chipnr]->chip_type="i82527";
141         candevices_p[card]->chip[chipnr]->chip_base_addr=candevices_p[card]->io_addr;
142         candevices_p[card]->chip[chipnr]->clock = 16000000;
143         if (!strcmp(candevices_p[card]->hwname,"pip5"))
144                 candevices_p[card]->chip[chipnr]->int_cpu_reg = iCPU_DSC;
145         else
146                 candevices_p[card]->chip[chipnr]->int_cpu_reg = 0x0;
147         candevices_p[card]->chip[chipnr]->int_clk_reg = iCLK_SL1;
148         candevices_p[card]->chip[chipnr]->int_bus_reg = iBUS_CBY;
149         candevices_p[card]->chip[chipnr]->sja_cdr_reg = 0;
150         candevices_p[card]->chip[chipnr]->sja_ocr_reg = 0;
151
152         return 0;
153 }
154
155 int pip_init_obj_data(int chipnr, int objnr)
156 {
157         chips_p[chipnr]->msgobj[objnr]->obj_base_addr=chips_p[chipnr]->chip_base_addr+(objnr+1)*0x10;
158         chips_p[chipnr]->msgobj[objnr]->flags=0;
159         
160         return 0;
161 }
162
163 int pip5_program_irq(int card)
164 {
165         outb(0x01, candevices_p[card]->res_addr);
166         switch (candevices_p[card]->chip[0]->chip_irq) {
167                 case  3: { outb(0x03, candevices_p[card]->res_addr); break; }
168                 case  4: { outb(0x05, candevices_p[card]->res_addr); break; }
169                 case  5: { outb(0x07, candevices_p[card]->res_addr); break; }
170                 case 10: { outb(0x09, candevices_p[card]->res_addr); break; }
171                 case 11: { outb(0x0c, candevices_p[card]->res_addr); break; }
172                 case 15: { outb(0x0d, candevices_p[card]->res_addr); break; }
173                 default: {
174                 CANMSG("Supplied interrupt is not supported by the hardware\n");
175                 CANMSG("Please consult your user manual.\n");
176                 return -ENODEV;
177                 }
178         }
179         outb(0x00, candevices_p[card]->res_addr);
180
181         return 0;
182 }
183
184 int pip6_program_irq(int card)
185 {
186         unsigned char can_int = 0, can_addr = 0;
187
188         can_int = candevices_p[card]->chip[0]->chip_irq;
189         if ((can_int != 3) && (can_int != 4) && (can_int != 5) && (can_int != 6)
190                 && (can_int != 7) && (can_int != 9) && (can_int != 10) && 
191                 (can_int != 11) && (can_int != 12) && (can_int != 14) && 
192                 (can_int != 15)) {
193                 CANMSG("Invalid interrupt number\n");
194                 CANMSG("Valid interrupt numbers for the PIP6: 3,4,5,6,7,9,10,11,12,14 or 15\n");
195                 CANMSG("Please consult your user manual.\n");
196                 return -ENODEV;
197         }
198         switch (candevices_p[card]->io_addr) {
199                 case 0x1000: { can_addr = 0x01; break; }
200                 case 0x8000: { can_addr = 0x02; break; }
201                 case 0xe000: { can_addr = 0x03; break; }
202                 default: {
203                 CANMSG("Supplied io address is not valid, please check your manual\n");
204                 return -ENODEV;
205                 }
206         }
207         outb( (can_int<<4)|can_addr, 0x804);
208
209         return 0;
210 }
211
212 void pip_write_register(unsigned char data, unsigned long address)
213 {
214         outb(data,address);
215 }
216
217 unsigned pip_read_register(unsigned long address)
218 {
219         return inb(address);
220 }
221
222 /* !!! Don't change these functions !!! */
223 int pip5_register(struct hwspecops_t *hwspecops)
224 {
225         hwspecops->request_io = pip5_request_io;
226         hwspecops->release_io = pip5_release_io;
227         hwspecops->reset = pip_reset;
228         hwspecops->init_hw_data = pip_init_hw_data;
229         hwspecops->init_chip_data = pip_init_chip_data;
230         hwspecops->init_obj_data = pip_init_obj_data;
231         hwspecops->write_register = pip_write_register;
232         hwspecops->read_register = pip_read_register;
233         hwspecops->program_irq = pip5_program_irq;
234         return 0;
235 }
236
237 int pip6_register(struct hwspecops_t *hwspecops)
238 {
239         hwspecops->request_io = pip6_request_io;
240         hwspecops->release_io = pip6_release_io;
241         hwspecops->reset = pip_reset;
242         hwspecops->init_hw_data = pip_init_hw_data;
243         hwspecops->init_chip_data = pip_init_chip_data;
244         hwspecops->init_obj_data = pip_init_obj_data;
245         hwspecops->write_register = pip_write_register;
246         hwspecops->read_register = pip_read_register;
247         hwspecops->program_irq = pip6_program_irq;
248         return 0;
249 }