]> rtime.felk.cvut.cz Git - jenkicar/rpp-simulink.git/commit
Add model for testing ADC overrun
authorMichal Sojka <sojkam1@fel.cvut.cz>
Wed, 26 Aug 2015 20:31:14 +0000 (22:31 +0200)
committerMichal Sojka <sojkam1@fel.cvut.cz>
Wed, 26 Aug 2015 21:27:19 +0000 (23:27 +0200)
commit7416c1fe92027cbb526eed95a6edc04920e3cacf
treea63c9fe8203403435f938c1d54b710b7d54eb1ca
parent8343a24d04e3f8386e2696d42443a737b8a0977c
Add model for testing ADC overrun
rpp/demos/.gitattributes
rpp/demos/Makefile
rpp/demos/adc_overrun_test.slx [new file with mode: 0644]