]> rtime.felk.cvut.cz Git - jailhouse.git/commit
arm: Add support for Jetson TK1 board
authorJan Kiszka <jan.kiszka@siemens.com>
Mon, 16 Feb 2015 19:16:23 +0000 (20:16 +0100)
committerJan Kiszka <jan.kiszka@siemens.com>
Mon, 23 Feb 2015 14:05:24 +0000 (15:05 +0100)
commite060138dd255b3e7860b13ac8757c5bb19ef7772
tree57f2e5a845b904d7f74faab9905559b0e1bba70e
parent36e4a857269dc1dbb9912582e1cfbc4b0a88cacb
arm: Add support for Jetson TK1 board

The Jetson TK1 board uses the NVIDIA K1 processor, namely the Tegra124.
The CPU has 4 Cortex-A15 cores and a low-power companion core which we
do not support, though. This SoC apparently contains all virtualization
features we need, specifically full SMMU coverage of I/O devices.

For now, board support is similar to the Banana Pi: We replicate UART
and SMP/PSCI features and add some configs (only one for both demos as
only one UART is accessible).

Open issues, besides adding SMMU support, are managing the access to the
so-called legacy Interrupt controller of the K1 (an additional stage
between devices and GIC) and sub-page access control to various devices
(same issue as with the Allwinner A20). Also, it becomes clearer than
ever that we urgently need to refactor the UART layer as well as
SMP/PSCI support to reduce duplications.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
12 files changed:
configs/jetson-tk1-demo.c [new file with mode: 0644]
configs/jetson-tk1.c [new file with mode: 0644]
hypervisor/arch/arm/Makefile
hypervisor/arch/arm/include/asm/platform.h
hypervisor/arch/arm/include/asm/uart-tegra.h [new file with mode: 0644]
hypervisor/arch/arm/smp-tegra124.c [new file with mode: 0644]
hypervisor/arch/arm/uart-tegra.c [new file with mode: 0644]
inmates/lib/arm/Makefile.lib
inmates/lib/arm/include/mach-tegra124/mach/gic_v2.h [new file with mode: 0644]
inmates/lib/arm/include/mach-tegra124/mach/timer.h [new file with mode: 0644]
inmates/lib/arm/include/mach-tegra124/mach/uart.h [new file with mode: 0644]
inmates/lib/arm/uart-tegra.c [new file with mode: 0644]