core: Add support for a guest to access memory-mapped PCI configuration space

core: Add support for a guest to access memory-mapped PCI configuration space

This patch is continuation of PIO support to request PCI config space.
Now it can be reached via MMIO. So, filtering logics is pretty similar.
Read accesses to PCI config is allowed just for devices which are owned.
Write accesses are regulated in accordance with white-list.

There are some limitations though as follows:
- Just 4-bytes operations are supported
- Guest must use only instructions 0x6b and 0x89 (read/write through intermediate
registers)
- All-1's write not supported

Signed-off-by: Ivan Kolchin <ivan.kolchin@siemens.com>
[Jan: style adjustments]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>