]> rtime.felk.cvut.cz Git - jailhouse.git/commit
arm: irqchip: add SPI configuration in cell_init and cell_exit
authorJean-Philippe Brucker <jean-philippe.brucker@arm.com>
Fri, 4 Jul 2014 17:56:57 +0000 (18:56 +0100)
committerJan Kiszka <jan.kiszka@siemens.com>
Fri, 19 Dec 2014 10:04:07 +0000 (11:04 +0100)
commit446f5d9aef7d74179eed29388d31ad0c83260bba
treedf8bda11ba986d4e6dd9ac29cc57a7cfdf4a5511
parent22eb13f39d844e91157dfa63512199c756327849
arm: irqchip: add SPI configuration in cell_init and cell_exit

This patch enables the routing of SPIs to the new cell's first CPU. When
destroyed, all SPIs are re-routed to the root cell.
An exhaustive implementation would save the targets of each IRQ before
transferring it to a new cell. Since linux does not currently route SPIs
to secondary CPUs and the root cell is not supposed to use devices that
will be assigned to guests anyway, it should be safe to route everything
to CPU0.

This patch follows the core configuration and the IOAPIC implementation,
which only allows to use the first 64 SPIs.
A future patch will need to change this minimal bitmap size to 988.

Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
[Jan: switch to mmio accessors]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
hypervisor/arch/arm/control.c
hypervisor/arch/arm/gic-v3.c
hypervisor/arch/arm/include/asm/cell.h
hypervisor/arch/arm/include/asm/irqchip.h
hypervisor/arch/arm/irqchip.c
hypervisor/arch/arm/setup.c