]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/history - system/src/constrs/microzed_CAN-CC_RevA.xdc
scripts: include script for applying new FPGA design at runtime.
[fpga/zynq/canbench-sw.git] / system / src / constrs / microzed_CAN-CC_RevA.xdc
2016-05-16 Martin Jerabeksystem: added constraints file