X-Git-Url: http://rtime.felk.cvut.cz/gitweb/fpga/zynq/canbench-sw.git/blobdiff_plain/4413e7626dcc5a4512960c8693749832cc990e67..a9f1e455e73421dfede13efd167511860657f1d0:/system/ip/can_merge/can_merge.vhd

diff --git a/system/ip/can_merge/can_merge.vhd b/system/ip/can_merge/can_merge.vhd
index d7f580e..d68260b 100644
--- a/system/ip/can_merge/can_merge.vhd
+++ b/system/ip/can_merge/can_merge.vhd
@@ -14,10 +14,11 @@ entity can_merge is
     Port ( can_rx : out STD_LOGIC;
            can_tx1 : in STD_LOGIC := '1';
            can_tx2 : in STD_LOGIC := '1';
-           can_tx3 : in STD_LOGIC := '1');
+           can_tx3 : in STD_LOGIC := '1';
+           can_tx4 : in STD_LOGIC := '1');
 end can_merge;
 
 architecture Behavioral of can_merge is
 begin
-    can_rx <= can_tx1 and can_tx2 and can_tx3;
+    can_rx <= can_tx1 and can_tx2 and can_tx3 and can_tx4;
 end Behavioral;