]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-hw.git/history - can-interface.sch
footprints positioned, better D-SUB footprints, fixes
[fpga/zynq/canbench-hw.git] / can-interface.sch
2016-04-12 Martin Jerabekfootprints positioned, better D-SUB footprints, fixes
2016-04-12 Martin Jerabekuser leds: transistors replaced by 4-channel XOR gates
2016-04-10 Martin Jerabekpower reg changed, I/O pin assignment, testpoints, CAN
2016-04-05 Martin JerabekCAN termination & merging redesigned, added connectors...