]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-hw.git/history - canbench-hw.pro
power reg changed, I/O pin assignment, testpoints, CAN
[fpga/zynq/canbench-hw.git] / canbench-hw.pro
2016-04-10 Martin Jerabekpower reg changed, I/O pin assignment, testpoints, CAN
2016-04-05 Martin JerabekCAN termination & merging redesigned, added connectors...
2016-03-15 Martin JerabekUsed MicroHeaders from kicad-parts
2016-03-15 Martin Jerabekvcco renamed to vccio
2016-03-15 Martin JerabekAdded 2nd microheader.
2016-03-14 Martin JerabekAdded basic schema with 4x CAN Transceiver and 1x Micro...