]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-hw.git/history - lib/conn_100pin.lib
CAN termination & merging redesigned, added connectors, power regulators, user I/O
[fpga/zynq/canbench-hw.git] / lib / conn_100pin.lib
2016-03-15 Martin JerabekAdded 2nd microheader.
2016-03-14 Martin JerabekAdded basic schema with 4x CAN Transceiver and 1x Micro...