layout: connectors, KEYs; added ESD protection

[fpga/zynq/canbench-hw.git] / power.sch

diff --git a/power.sch b/power.sch
index 8a0b11947f82b341a267e7a0ea72e3c8e79469ee..40b51989c884b6bfcb172d3089400062dccd16ac 100644 (file)
--- a/power.sch
+++ b/power.sch
@@ -77,6 +77,7 @@ LIBS:mcp
 LIBS:JX1
 LIBS:JX2
 LIBS:gates
+LIBS:usblc6
 LIBS:canbench-hw-cache
 EELAYER 25 0
 EELAYER END